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Message-ID: <YSOSJK0FmbgNynRc@piout.net>
Date: Mon, 23 Aug 2021 14:18:44 +0200
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
To: Claudiu Beznea <claudiu.beznea@...rochip.com>
Cc: nicolas.ferre@...rochip.com, ludovic.desroches@...rochip.com,
robh+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] ARM: dts: at91: enable ips for sama7g5
On 23/08/2021 13:03:53+0300, Claudiu Beznea wrote:
> Hi,
>
> The following patches enable UDDRC, DDR3 PHY, SECURAM and SHDWC IPs
> on SAMA7G5.
>
> Thank you,
> Claudiu Beznea
>
> Claudiu Beznea (3):
> ARM: dts: at91: add ram bindings
> ARM: dts: at91: add bindins for securam
> ARM: dts: at91: add bindings for shdwc
I think you meant node instead of bindings.
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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