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Message-ID: <95c5001a-87dc-2548-97de-538da713b9b6@somainline.org>
Date:   Sat, 28 Aug 2021 18:22:36 +0200
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Maulik Shah <mkshah@...eaurora.org>,
        ~postmarketos/upstreaming@...ts.sr.ht
Cc:     martin.botka@...ainline.org,
        angelogioacchino.delregno@...ainline.org,
        marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
        Rob Herring <robh@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Brown <broonie@...nel.org>,
        Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        Sebastian Reichel <sre@...nel.org>,
        Sudeep Holla <sudeep.holla@....com>,
        Hector Martin <marcan@...can.st>,
        Vinod Koul <vkoul@...nel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Kees Cook <keescook@...omium.org>,
        Anton Vorontsov <anton@...msg.org>,
        Colin Cross <ccross@...roid.com>,
        Tony Luck <tony.luck@...el.com>, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v2 02/18] arm64: dts: qcom: Add SM6350 device tree


>> +
>> +        tcsr_mutex: hwlock@...0000 {
>> +            compatible = "qcom,tcsr-mutex";
>> +            reg = <0x0 0x01f40000 0x0 0x40000>;
>> +            #hwlock-cells = <1>;
>> +        };
>> +
>> +        pdc: interrupt-controller@...0000 {
>> +            compatible = "qcom,sm6350-pdc", "qcom,pdc";
>> +            reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x64>;
>
> The second reg  0x17c000f0 is neither documented nor used in PDC irq chip driver. can you please remove it?
>
> Thanks,
> Maulik
>
Wouldn't it make more sense to keep it (like in other PDC-enabled SoCs' device trees) so that there's no

need to add it back when the driver gains support for spi_configure_type (I believe that's what it's used for)?


Konrad

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