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Message-ID: <CAE-0n52OjXovJJ2HNFPgyGn6vS84wgrEv4C66-tb176nUbdwSg@mail.gmail.com>
Date: Mon, 30 Aug 2021 17:58:00 -0700
From: Stephen Boyd <swboyd@...omium.org>
To: Kuogee Hsieh <khsieh@...eaurora.org>, agross@...nel.org,
bjorn.andersson@...aro.org, devicetree@...r.kernel.org,
robdclark@...il.com, robh+dt@...nel.org, sean@...rly.run,
vkoul@...nel.org
Cc: abhinavk@...eaurora.org, aravindh@...eaurora.org,
mkrishn@...eaurora.org, kalyan_t@...eaurora.org,
rajeevny@...eaurora.org, freedreno@...ts.freedesktop.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: sc7280: Add Display Port node
Quoting Kuogee Hsieh (2021-08-30 09:04:49)
> Changes in v2:
> -- break this patch into 3 patches
Are there two more somewhere?
>
> Signed-off-by: Kuogee Hsieh <khsieh@...eaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 88 +++++++++++++++++++++++++++++++++++-
> 1 file changed, 87 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c29226b..f224029 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -3202,6 +3202,13 @@
> remote-endpoint = <&edp_in>;
> };
> };
> +
> + port@2 {
> + reg = <2>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint = <&dp_in>;
> + };
> + };
> };
>
> mdp_opp_table: mdp-opp-table {
> @@ -3389,6 +3396,78 @@
> };
> };
> };
> +
> + msm_dp: displayport-controller@...0000 {
> + status = "disabled";
> + compatible = "qcom,sc7180-dp", "qcom,sc7280-dp";
It should be most specific to least specific from left to right. I'd
rather see "qcom,sc7180-dp" dropped entirely as it will become important
to know that sc7280 has eDP and DP whereas sc7180 only has DP. We should
key that knowledge off the compatible string, so having sc7180-dp here
makes that harder, not easier.
> +
> + reg = <0 0x0ae90000 0 0x1400>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + clock-names = "core_iface",
> + "core_aux",
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