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Message-Id: <20210906183621.21075-1-shruthi.sanil@intel.com>
Date:   Tue,  7 Sep 2021 00:06:19 +0530
From:   shruthi.sanil@...el.com
To:     daniel.lezcano@...aro.org, tglx@...utronix.de, robh+dt@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Cc:     andriy.shevchenko@...ux.intel.com, kris.pan@...ux.intel.com,
        mgross@...ux.intel.com, srikanth.thokala@...el.com,
        lakshmi.bai.raja.subramanian@...el.com,
        mallikarjunappa.sangannavar@...el.com, shruthi.sanil@...el.com
Subject: [PATCH v6 0/2] Add the driver for Intel Keem Bay SoC timer block

From: Shruthi Sanil <shruthi.sanil@...el.com>

The timer block supports 1 64-bit free running counter
and 8 32-bit general purpose timers.

Patch 1 holds the device tree binding documentation.
Patch 2 holds the device driver.

This driver is tested on the Keem Bay evaluation module board.

Changes since v5:
- Created a MFD device for the common configuration register
  in the device tree bindings.
- Updated the timer driver with the MFD framework to access the
  common configuration register.

Changes since v4:
- Updated the description in the device tree bindings.
- Updated the unit address of all the timers and counter
  in the device tree binding.

Changes since v3:
- Update in KConfig file to support COMPILE_TEST for Keem Bay timer.
- Update in device tree bindings to remove status field.
- Update in device tree bindings to remove 64-bit address space for
  the child nodes by using non-empty ranges.

Changes since v2:
- Add multi timer support.
- Update in the device tree binding to support multi timers.
- Code optimization.

Changes since v1:
- Add support for KEEMBAY_TIMER to get selected through Kconfig.platforms.
- Add CLOCK_EVT_FEAT_DYNIRQ as part of clockevent feature.
- Avoid overlapping reg regions across 2 device nodes.
- Simplify 2 device nodes as 1 because both are from same IP block.
- Adapt the driver code according to the new simplified devicetree.

Shruthi Sanil (2):
  dt-bindings: timer: Add bindings for Intel Keem Bay SoC Timer
  clocksource: Add Intel Keem Bay timer support

 .../bindings/timer/intel,keembay-timer.yaml   | 173 ++++++++++++
 MAINTAINERS                                   |   5 +
 drivers/clocksource/Kconfig                   |  11 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-keembay.c           | 252 ++++++++++++++++++
 5 files changed, 442 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/intel,keembay-timer.yaml
 create mode 100644 drivers/clocksource/timer-keembay.c


base-commit: 27151f177827d478508e756c7657273261aaf8a9
-- 
2.17.1

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