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Message-Id: <20210907083723.7725-4-granquet@baylibre.com>
Date: Tue, 7 Sep 2021 10:37:20 +0200
From: Guillaume Ranquet <granquet@...libre.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, CK Hu <ck.hu@...iatek.com>,
Jitao shi <jitao.shi@...iatek.com>,
dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org
Subject: [PATCH 3/4] dt-bindings: phy: Add binding for Mediatek MT8195 HDMI PHY
Add bindings to describe Mediatek MT8195 HDMI PHY
Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
---
.../phy/mediatek,mtk8195-hdmi-phy.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml
new file mode 100644
index 000000000000..f03bd3af7fd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding for mt8195
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@...nel.org>
+ - Philipp Zabel <p.zabel@...gutronix.de>
+ - Chunfeng Yun <chunfeng.yun@...iatek.com>
+
+description: |
+ The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
+ output and drives the HDMI pads.
+
+properties:
+ $nodename:
+ pattern: "^hdmi-phy@[0-9a-f]+$"
+
+ compatible:
+ - const: mediatek,mt8195-hdmi-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: PLL reference clock
+
+ clock-names:
+ items:
+ - const: hdmi_xtal_sel
+
+ clock-output-names:
+ items:
+ - const: hdmi_txpll
+
+ "#phy-cells":
+ const: 0
+
+ "#clock-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - clock-output-names
+ - "#phy-cells"
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8195-clk.h>
+ hdmi_phy: hdmi-phy@...5f000 {
+ compatible = "mediatek,mt8195-hdmi-phy";
+ reg = <0 0x11d5f000 0 0x100>;
+ clocks = <&topckgen CLK_TOP_HDMI_XTAL>;
+ clock-names = "hdmi_xtal_sel";
+ clock-output-names = "hdmi_txpll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ };
+
+...
--
2.31.1
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