linux-kernel - [PATCH 0/2] riscv: improve unaligned memory accesses

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Message-ID: <20210913121956.1776656-1-chenhuang5@huawei.com>
Date:   Mon, 13 Sep 2021 12:19:54 +0000
From:   Chen Huang <chenhuang5@...wei.com>
To:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>
CC:     Chen Huang <chenhuang5@...wei.com>,
        Kefeng Wang <wangkefeng.wang@...wei.com>,
        <linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 0/2] riscv: improve unaligned memory accesses

The RISCV ISA can support unaligned memory accesses, so the patchset
selects HAVE_EFFICIENT_UNALIGNED_ACCESS and supports DCACHE_WORD_ACCESS
to improve the efficiency of unaligned memory accesses.

Chen Huang (2):
  riscv: Kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS
  riscv: Support DCACHE_WORD_ACCESS

 arch/riscv/Kconfig                      |  2 ++
 arch/riscv/include/asm/word-at-a-time.h | 36 +++++++++++++++++++++++++
 2 files changed, 38 insertions(+)

-- 
2.18.0.huawei.25