linux-kernel - Re: [PATCH v5 3/9] coresight: tmc-etf: Add comment for store ordering

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Message-ID: <60c20d8e-4386-5c54-4607-d9399713d2ef@arm.com>
Date:   Tue, 14 Sep 2021 09:24:18 +0100
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     Leo Yan <leo.yan@...aro.org>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Mike Leach <mike.leach@...aro.org>,
        Michael Petlan <mpetlan@...hat.com>,
        "Frank Ch. Eigler" <fche@...hat.com>,
        Song Liu <songliubraving@...com>, x86@...nel.org,
        Daniel Díaz <daniel.diaz@...aro.org>,
        Andrii Nakryiko <andriin@...com>,
        Alexei Starovoitov <ast@...nel.org>,
        Sedat Dilek <sedat.dilek@...il.com>,
        Andi Kleen <ak@...ux.intel.com>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        coresight@...ts.linaro.org
Subject: Re: [PATCH v5 3/9] coresight: tmc-etf: Add comment for store ordering

On 09/08/2021 12:14, Leo Yan wrote:
> Since the function CS_LOCK() has contained memory barrier mb(), it
> ensures the visibility of the AUX trace data before updating the
> aux_head, thus it's needless to add any explicit barrier anymore.
> 
> Add comment to make clear for the barrier usage for ETF.
> 
> Signed-off-by: Leo Yan <leo.yan@...aro.org>
> ---
>   drivers/hwtracing/coresight/coresight-tmc-etf.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index cd0fb7bfba68..8debd4f40f06 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -553,6 +553,11 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
>   	if (buf->snapshot)
>   		handle->head += to_read;
>   
> +	/*
> +	 * CS_LOCK() contains mb() so it can ensure visibility of the AUX trace
> +	 * data before the aux_head is updated via perf_aux_output_end(), which
> +	 * is expected by the perf ring buffer.
> +	 */
>   	CS_LOCK(drvdata->base);
>   out:
>   	spin_unlock_irqrestore(&drvdata->spinlock, flags);
> 

I will queue this.

Thanks
Suzuki