linux-kernel - Re: [PATCH v4 1/2] spi: cadence: add dt-bindings documentation for Cadence XSPI controller

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Date:   Thu, 16 Sep 2021 19:52:45 -0500
From:   Rob Herring <robh@...nel.org>
To:     Parshuram Thombare <pthombar@...ence.com>
Cc:     broonie@...nel.org, lukas@...ner.de, p.yadav@...com,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, jpawar@...ence.com,
        mparab@...ence.com, Konrad Kociolek <konrad@...ence.com>
Subject: Re: [PATCH v4 1/2] spi: cadence: add dt-bindings documentation for
 Cadence XSPI controller

On Mon, Sep 13, 2021 at 02:04:44PM +0200, Parshuram Thombare wrote:
> Add DT binding for Cadence's XSPI controller driver.
> 
> Signed-off-by: Konrad Kociolek <konrad@...ence.com>
> Signed-off-by: Jayshri Pawar <jpawar@...ence.com>
> Signed-off-by: Parshuram Thombare <pthombar@...ence.com>
> ---
>  .../devicetree/bindings/spi/cdns,xspi.yaml         | 77 ++++++++++++++++++++++
>  1 file changed, 77 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/cdns,xspi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml
> new file mode 100644
> index 0000000..5ebede1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2020-21 Cadence
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Cadence XSPI Controller
> +
> +maintainers:
> +  - Parshuram Thombare <pthombar@...ence.com>
> +
> +description: |
> +  The XSPI controller allows SPI protocol communication in
> +  single, dual, quad or octal wire transmission modes for
> +  read/write access to slaves such as SPI-NOR flash.
> +
> +allOf:
> +  - $ref: "spi-controller.yaml#"
> +
> +properties:
> +  compatible:
> +    const: cdns,xspi-nor
> +
> +  reg:
> +    items:
> +      - description: address and length of the controller register set
> +      - description: address and length of the Slave DMA data port
> +      - description: address and length of the auxiliary registers
> +
> +  reg-names:
> +    items:
> +      - const: xspi-iobase
> +      - const: xspi-sdmabase
> +      - const: xspi-auxbase

'xspi' and 'base' are redundant. So just io, sdma, and aux.

> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    bus {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        xspi: spi@...10000 {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            compatible = "cdns,xspi-nor";
> +            reg = <0x0 0xa0010000 0x0 0x10000>,
> +                  <0x0 0xb0000000 0x0 0x10000>,
> +                  <0x0 0xa0020000 0x0 0x10000>;

Unless you are really using 64KB of registers, that wastes a bunch of 
virtual space which is limited on 32-bit platforms.

> +            reg-names = "xspi-iobase", "xspi-sdmabase", "xspi-auxbase";
> +            interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
> +            interrupt-parent = <&gic>;
> +
> +            flash@0 {
> +                compatible = "jedec,spi-nor";
> +                spi-max-frequency = <75000000>;
> +                reg = <0>;
> +            };
> +
> +            flash@1 {
> +                compatible = "jedec,spi-nor";
> +                spi-max-frequency = <75000000>;
> +                reg = <1>;
> +            };
> +        };
> +    };
> -- 
> 2.7.4
> 
>