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Date:   Thu, 16 Sep 2021 19:49:06 -0500
From:   Rob Herring <robh@...nel.org>
To:     Sean Anderson <sean.anderson@...o.com>
Cc:     linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
        Alvaro Gamez <alvaro.gamez@...ent.com>,
        linux-arm-kernel@...ts.infradead.org,
        Lee Jones <lee.jones@...aro.org>,
        Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
        Thierry Reding <thierry.reding@...il.com>,
        linux-kernel@...r.kernel.org, michal.simek@...inx.com
Subject: Re: [PATCH v7 1/3] dt-bindings: pwm: Add Xilinx AXI Timer

On Thu, 16 Sep 2021 14:05:41 -0400, Sean Anderson wrote:
> This adds a binding for the Xilinx LogiCORE IP AXI Timer. This device is a
> "soft" block, so it has some parameters which would not be configurable in
> most hardware. This binding is usually automatically generated by Xilinx's
> tools, so the names and values of some properties should be kept as they
> are, if possible. In addition, this binding is already in the kernel at
> arch/microblaze/boot/dts/system.dts, and in user software such as QEMU.
> 
> The existing driver uses the clock-frequency property, or alternatively the
> /cpus/timebase-frequency property as its frequency input. Because these
> properties are deprecated, they have not been included with this schema.
> All new bindings should use the clocks/clock-names properties to specify
> the parent clock.
> 
> Because we need to init timer devices so early in boot, we determine if we
> should use the PWM driver or the clocksource/clockevent driver by the
> presence/absence, respectively, of #pwm-cells. Because both counters are
> used by the PWM, there is no need for a separate property specifying which
> counters are to be used for the PWM.
> 
> Signed-off-by: Sean Anderson <sean.anderson@...o.com>
> ---
> 
> Changes in v7:
> - Add #pwm-cells to properties
> - Document why additionalProperties is true
> 
> Changes in v6:
> - Enumerate possible counter widths
> - Fix incorrect schema id
> 
> Changes in v5:
> - Add example for timer binding
> - Fix indentation lint
> - Move schema into the timer directory
> - Remove xlnx,axi-timer-2.0 compatible string
> - Update commit message to reflect revisions
> 
> Changes in v4:
> - Make some properties optional for clocksource drivers
> - Predicate PWM driver on the presence of #pwm-cells
> - Remove references to generate polarity so this can get merged
> 
> Changes in v3:
> - Add an example with non-deprecated properties only.
> - Add xlnx,pwm and xlnx,gen?-active-low properties.
> - Make newer replacement properties mutually-exclusive with what they
>   replace
> - Mark all boolean-as-int properties as deprecated
> 
> Changes in v2:
> - Use 32-bit addresses for example binding
> 
>  .../bindings/timer/xlnx,xps-timer.yaml        | 94 +++++++++++++++++++
>  1 file changed, 94 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml:71:111: [warning] line too long (154 > 110 characters) (line-length)

dtschema/dtc warnings/errors:

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1529007

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

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