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Message-ID: <20210922093303.23720-1-seiya.wang@mediatek.com>
Date: Wed, 22 Sep 2021 17:33:02 +0800
From: Seiya Wang <seiya.wang@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <srv_heupstream@...iatek.com>
Subject: [PATCH v4 0/1] Add basic node support for Mediatek MT8195 SoC
MT8195 is a SoC based on 64bit ARMv8 architecture.
It contains 4 CA55 and 4 CA78 cores.
MT8195 share many HW IP with MT65xx series.
This patchset was tested on MT8195 evaluation board to shell.
Based on next-20210916
Changes in v4
Add clock, i2c, pwrap, xhci nodes
Use clock driver instead of dummy clock
Remove ufsphy node
Changes in v3
Add spi and pinctrl nodes
Changes in v2
Fix make dt_binding_check warning in mediatek,ufs-phy.yaml
Update usb phy and ufs phy nodes in mt8195.dtsi
Seiya Wang (1):
arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and
Makefile
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 29 ++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 561 ++++++++++++++++++++++++++++
3 files changed, 591 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi
--
2.14.1
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