linux-kernel - Re: [PATCH v4 6/6] arm64: dts: ti: iot2050: Add support for product generation 2 boards

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Sun, 26 Sep 2021 13:57:49 +0200
From:   Jan Kiszka <jan.kiszka@....de>
To:     Nishanth Menon <nm@...com>
Cc:     Tero Kristo <kristo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Bao Cheng Su <baocheng.su@...mens.com>,
        Chao Zeng <chao.zeng@...mens.com>
Subject: Re: [PATCH v4 6/6] arm64: dts: ti: iot2050: Add support for product
 generation 2 boards

On 22.09.21 17:58, Nishanth Menon wrote:
> On 14:27-20210915, Jan Kiszka wrote:
>> From: Jan Kiszka <jan.kiszka@...mens.com>
>>
>> This adds the devices trees for IOT2050 Product Generation 2 (PG2)
>> boards. We have Basic and an Advanced variants again, differing in
>> number of cores, RAM size, availability of eMMC and further details.
>> The major difference to PG1 is the used silicon revision (SR2.x on
>> PG2).
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
>> ---
>>  arch/arm64/boot/dts/ti/Makefile               |  2 +
>>  .../dts/ti/k3-am65-iot2050-common-pg2.dtsi    | 51 +++++++++++++++++++
>>  .../dts/ti/k3-am6528-iot2050-basic-pg2.dts    | 24 +++++++++
>>  .../dts/ti/k3-am6548-iot2050-advanced-pg2.dts | 29 +++++++++++
>>  4 files changed, 106 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
>>  create mode 100644 arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dts
>>  create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts
>>
>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>> index d56c742f5a10..41a4bc96e6bd 100644
>> --- a/arch/arm64/boot/dts/ti/Makefile
>> +++ b/arch/arm64/boot/dts/ti/Makefile
>> @@ -8,7 +8,9 @@
>>
>>  dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb
>>  dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
>> +dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb
>>  dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
>> +dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb
>>
>>  dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
>> new file mode 100644
>> index 000000000000..c25bce7339b7
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
>> @@ -0,0 +1,51 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (c) Siemens AG, 2021
>> + *
>> + * Authors:
>> + *   Chao Zeng <chao.zeng@...mens.com>
>> + *   Jan Kiszka <jan.kiszka@...mens.com>
>> + *
>> + * Common bits of the IOT2050 Basic and Advanced variants, PG2
>> + */
>> +
>> +&main_pmx0 {
>> +	cp2102n_reset_pin_default: cp2102n-reset-pin-default {
>> +		pinctrl-single,pins = <
>> +			/* (AF12) GPIO1_24, used as cp2102 reset */
>> +			AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
>> +		>;
>> +	};
>> +};
>> +
>> +&main_gpio1 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&cp2102n_reset_pin_default>;
>> +	gpio-line-names =
>> +		"", "", "", "", "", "", "", "", "", "",
>> +		"", "", "", "", "", "", "", "", "", "",
>> +		"", "", "", "", "CP2102N-RESET";
>> +};
>> +
>> +&dss {
>> +	/* Workaround needed to get DP clock of 154Mhz */
>> +	assigned-clocks = <&k3_clks 67 0>;
>> +};
>> +
>> +&serdes0 {
>> +	assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
>> +	assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
>> +};
>> +
>> +&dwc3_0 {
>> +	assigned-clock-parents = <&k3_clks 151 4>,  /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
>> +				 <&k3_clks 151 8>;  /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
>> +	phys = <&serdes0 PHY_TYPE_USB3 0>;
>> +	phy-names = "usb3-phy";
>> +};
>> +
>> +&usb0_phy {
>> +	maximum-speed = "super-speed";
>> +	snps,dis-u1-entry-quirk;
>> +	snps,dis-u2-entry-quirk;
>
> ^^
> 	did you mean &usb0?
> usb0_phy uses Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml
> usb0 uses Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>
> am i missing a "maximum-speed" there? quirks look like belonging to the
> controller ?
>

Yes, this was probably just a typo, must be "usb0" indeed. Colleagues
confirmed this as well. I'll send an update.

Jan