linux-kernel - [PATCH v1 3/3] serial:8250: Add non standard baudrate support for MCHP PCI1XXXX UART

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Message-ID: <20210929113049.64557-4-LakshmiPraveen.Kopparthi@microchip.com>
Date:   Wed, 29 Sep 2021 17:00:49 +0530
From:   LakshmiPraveen Kopparthi <LakshmiPraveen.Kopparthi@...rochip.com>
To:     <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
        <andriy.shevchenko@...ux.intel.com>, <macro@...am.me.uk>,
        <zev@...ilderbeest.net>, <vigneshr@...com>,
        <linux-serial@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <UNGLinuxDriver@...rochip.com>
Subject: [PATCH v1 3/3] serial:8250: Add non standard baudrate support for MCHP PCI1XXXX UART

This patch adds support to exercise all the baud rates.Only few
standard baud rates can be achieved by writing the standard
baud rate registers(DLL, DLM).To achieve  all the baud rates,
additional register writes are needed.

Signed-off-by: LakshmiPraveen Kopparthi <LakshmiPraveen.Kopparthi@...rochip.com>
---
 drivers/tty/serial/8250/8250_pci.c | 57 ++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index b06374fc6212..cacb8b03f5db 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1888,6 +1888,8 @@ pci_moxa_setup(struct serial_private *priv,
 
 #define UART_ACTV_REG 0x11
 #define ADC_CFG_REG 0x40
+#define CLK_SEL_REG 0x50
+#define CLK_DIVISOR_REG 0x54
 #define UART_PCI_CTRL_REG 0x80
 #define UART_WAKE_REG 0x8C
 #define UART_WAKE_MASK_REG 0x90
@@ -1896,6 +1898,11 @@ pci_moxa_setup(struct serial_private *priv,
 #define ADC_EN BIT(0)
 #define ADC_PIN_SEL BIT(1)
 #define ADC_POLARITY BIT(2)
+#define UART_BIT_SAMPLE_CNT 16
+
+#define CLK_SEL_MASK 0x03
+#define CLK_SEL_500MHZ 0x01
+#define CLK_SEL_166MHZ 0x02
 
 static int mchp_pci1xxxx_rs485_config(struct uart_port *port,
 				      struct serial_rs485 *rs485)
@@ -1920,6 +1927,55 @@ static int mchp_pci1xxxx_rs485_config(struct uart_port *port,
 	return 0;
 }
 
+static void mchp_pci1xxxx_set_termios(struct uart_port *port,
+				      struct ktermios *termios,
+				      struct ktermios *old)
+{
+	unsigned int standard_baud_list[] = {50, 75, 110, 134, 150, 300,
+				600, 1200, 1800, 2000, 2400, 3600,
+				4800, 7200, 9600, 19200, 38400, 57600,
+				115200, 125000, 136400, 150000, 166700,
+				187500, 214300, 250000, 300000, 375000,
+				500000, 750000, 1000000, 1500000};
+	unsigned int baud = tty_termios_baud_rate(termios);
+	unsigned int quot;
+	unsigned int frac;
+	unsigned int i;
+	unsigned int baud_clock;
+
+	baud = tty_termios_baud_rate(termios);
+	serial8250_do_set_termios(port, termios, NULL);
+
+	if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) {
+		writel((port->custom_divisor & 0x3FFFFFFF),
+		       (port->membase + CLK_DIVISOR_REG));
+	} else {
+		for (i = 0; i < ARRAY_SIZE(standard_baud_list); i++) {
+			if (baud == standard_baud_list[i])
+				return;
+		}
+		tty_termios_encode_baud_rate(termios, baud, baud);
+		baud_clock = readb(port->membase + CLK_SEL_REG);
+
+		if ((baud_clock & CLK_SEL_MASK) == CLK_SEL_500MHZ) {
+			quot = 500000000 / (16 * baud);
+			writel(quot, (port->membase + CLK_DIVISOR_REG));
+		} else if ((baud_clock & CLK_SEL_MASK) == CLK_SEL_166MHZ) {
+			quot = (166667 * 1000) / (16 * baud);
+			writel(quot, (port->membase + CLK_DIVISOR_REG));
+		} else {
+			baud = uart_get_baud_rate(port, termios, old,
+						  50, 1500000);
+			quot = ((1000000000) / (baud * UART_BIT_SAMPLE_CNT));
+			frac = (((1000000000 - (quot * baud *
+				UART_BIT_SAMPLE_CNT)) / UART_BIT_SAMPLE_CNT)
+				* 255) / baud;
+			writel(frac | (quot << 8),
+			       (port->membase + CLK_DIVISOR_REG));
+		}
+	}
+}
+
 static char pci1xxxx_port_suspend(int line)
 {
 	struct uart_8250_port *up = serial8250_get_port(line);
@@ -2102,6 +2158,7 @@ static int mchp_pci1xxxx_setup(struct serial_private *priv,
 	port->port.flags |= UPF_FIXED_TYPE | UPF_SKIP_TEST;
 	port->port.type = PORT_MCHP16550A;
 	port->port.rs485_config = mchp_pci1xxxx_rs485_config;
+	port->port.set_termios = mchp_pci1xxxx_set_termios;
 	ret = setup_port(priv, port, bar, offset, board->reg_shift);
 	if (ret < 0)
 		return ret;
-- 
2.25.1