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Message-ID: <18be825f-b3f3-3e05-1b14-82712d9a6c0d@intel.com>
Date:   Wed, 29 Sep 2021 08:07:10 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Joerg Roedel <joro@...tes.org>, x86@...nel.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        hpa@...or.com, Dave Hansen <dave.hansen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Joerg Roedel <jroedel@...e.de>,
        Mike Rapoport <rppt@...nel.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Brijesh Singh <brijesh.singh@....com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/4] x86/mm: Flush global TLB when switching to
 trampoline page-table

On 9/29/21 7:55 AM, Joerg Roedel wrote:
> +	/*
> +	 * Flush global TLB entries to catch any bugs where code running on the
> +	 * trampoline_pgd uses memory not mapped into the trampoline page-table.
> +	 */
> +	__flush_tlb_all();
> +}

This comment took me a minute to parse.  How about a bit more info, like:

	/*
	 * The CR3 writes above may not flush global TLB entries.
	 * Stale, global entries from previous sets of page tables may
	 * still be present.  Flush those stale entries.
	 *
	 * This ensures that memory accessed while running with
	 * trampoline_pgd is *actually* mapped into trampoline_pgd.
	 */

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