linux-kernel - Re: [PATCH v2 2/4] x86/mm/64: Flush global TLB on AP bringup

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Message-ID: <9d1d3000-d4eb-eb6d-1a34-4b58fb0322e3@intel.com>
Date:   Wed, 29 Sep 2021 08:09:38 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Joerg Roedel <joro@...tes.org>, x86@...nel.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        hpa@...or.com, Dave Hansen <dave.hansen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Joerg Roedel <jroedel@...e.de>,
        Mike Rapoport <rppt@...nel.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Brijesh Singh <brijesh.singh@....com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/4] x86/mm/64: Flush global TLB on AP bringup

On 9/29/21 7:54 AM, Joerg Roedel wrote:
> The AP bringup code uses the trampoline_pgd page-table, which
> establishes global mappings in the user range of the address space.
> Flush the global TLB entries after CR4 is setup for the AP to make sure
> no stale entries remain in the TLB.
...
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 0f8885949e8c..0f71ea2e5680 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -436,6 +436,12 @@ void cr4_init(void)
>  
>  	/* Initialize cr4 shadow for this CPU. */
>  	this_cpu_write(cpu_tlbstate.cr4, cr4);
> +
> +	/*
> +	 * Flush any global TLB entries that might be left from the
> +	 * trampline_pgd.
> +	 */
> +	__flush_tlb_all();
>  }

Is there a reason to do this flush here as opposed to doing it closer to
the CR3 write where we switch away from trampoline_pgd?  cr4_init()
seems like an odd place.