lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <9b278eb2-7ca9-0e4b-ecb1-5949ce3c5c10@foss.st.com>
Date:   Thu, 30 Sep 2021 17:05:50 +0200
From:   Alexandre TORGUE <alexandre.torgue@...s.st.com>
To:     Marek Vasut <marex@...x.de>,
        Olivier Moysan <olivier.moysan@...s.st.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Rob Herring <robh+dt@...nel.org>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH 1/1] ARM: dts: stm32: fix AV96 board SAI2B pin muxing on
 stm32mp15

On 9/30/21 12:26 PM, Marek Vasut wrote:
> On 9/30/21 10:47 AM, Alexandre TORGUE wrote:
>> Hi Marek
>>
>> On 9/29/21 1:18 PM, Marek Vasut wrote:
>>> On 9/27/21 1:45 PM, Olivier Moysan wrote:
>>>> Fix SAI2B pin muxing for AV96 board on STM32MP15.
>>>> The label "sai2a-4" is defined twice. Change redundant label to 
>>>> "sai2b-4".
>>>>
>>>> Fixes: dcf185ca8175 ("ARM: dts: stm32: Add alternate pinmux for SAI2 
>>>> pins on stm32mp15")
>>>>
>>>> Signed-off-by: Olivier Moysan <olivier.moysan@...s.st.com>
>>>> ---
>>>>   arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 2 +-
>>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi 
>>>> b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>>>> index 5b60ecbd718f..b9cc9e0dd4fc 100644
>>>> --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>>>> +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>>>> @@ -1235,7 +1235,7 @@
>>>>           };
>>>>       };
>>>> -    sai2b_pins_c: sai2a-4 {
>>>> +    sai2b_pins_c: sai2b-4 {
>>>>           pins1 {
>>>>               pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
>>>>               bias-disable;
>>>
>>> This mp1 pinmuxing is a total mess, sigh.
>>
>> What is the issue here ?
> 
> The same-old discussion about where to place the pinmux nodes, whether 
> we should have these clusters of pre-defined options in ...pinctrl.dtsi, 
> or whether we should do more nxp-like per-board configuration.

ok it's a bit more precise. Honestly I don't understand why the current 
topology is an issue here. Maybe pinctrl SAI nodes names are not well 
chosen or are not enough explicit. Concerning our topology and the NXP 
ones both exists and both have advantages and drawbacks. For ST boards 
(DK/EV) we want to keep all configs in the same place.

As I prefer to not re open this topic again and again, feel free to add 
your pin config in your dts board file, I'll accept it.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ