linux-kernel - [PATCH 1/2] arm/arm64: dts: Enable 2.5G Ethernet port on CN9130-CRB

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Date:   Fri,  8 Oct 2021 12:06:18 +1300
From:   Chris Packham <chris.packham@...iedtelesis.co.nz>
To:     andrew@...n.ch, gregory.clement@...tlin.com,
        sebastian.hesselbarth@...il.com, robh+dt@...nel.org,
        kostap@...vell.com
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: [PATCH 1/2] arm/arm64: dts: Enable 2.5G Ethernet port on CN9130-CRB

Enable the 2.5G Ethernet port by setting the status to "okay" and the
phy-mode to "2500base-x" on the cn9130-crb boards. Tested on a
CN9130-CRB-A.

Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
---

The Marvell SDK adds 2500base-t and uses it in the equivalent dtsi but
looking at the documentation for both the SoC and the PHY I think
2500base-x is correct for the system interface (the line side is
2500base-t).

 arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 505ae69289f6..e7918f325646 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -214,8 +214,8 @@ &cp0_eth1 {
 };
 
 &cp0_eth2 {
-	/* This port uses "2500base-t" phy-mode */
-	status = "disabled";
+	status = "okay";
+	phy-mode = "2500base-x";
 	phy = <&nbaset_phy0>;
 	phys = <&cp0_comphy5 2>;
 };
-- 
2.33.0