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Date:   Fri, 8 Oct 2021 01:51:43 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc:     gregory.clement@...tlin.com, sebastian.hesselbarth@...il.com,
        robh+dt@...nel.org, kostap@...vell.com,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm/arm64: dts: Add MV88E6393X to CN9130-CRB device
 tree

On Fri, Oct 08, 2021 at 12:06:19PM +1300, Chris Packham wrote:
> The CN9130-CRB boards have a MV88E6393X switch connected to eth0.  Add
> the necessary dts nodes and properties for this.
> 
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> ---
> 
> This is taken from the Marvell SDK. I've re-ordered the port entries to
> be in ascending order.
> 
>  arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 125 ++++++++++++++++++++
>  1 file changed, 125 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> index e7918f325646..171f7394948e 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> @@ -185,6 +185,131 @@ &cp0_mdio {
>  	phy0: ethernet-phy@0 {
>  		reg = <0>;
>  	};
> +
> +	switch6: switch0@6 {
> +		/* Actual device is MV88E6393X */
> +		compatible = "marvell,mv88e6190";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		reg = <6>;

Is the interrupt output connected to a GPIO?

> +
> +		dsa,member = <0 0>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				label = "notused-port0";
> +				phy-mode = "10gbase-kr";
> +				status = "disabled";

What is meant by not used? Does it go to a header? Is it not wired at
all? You don't need to list a port if it is not actually used. So
maybe you just want to delete this port all together?

> +
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				label = "wan1";
> +				phy-handle = <&switch0phy1>;
> +			};
> +


> +
> +			port@8 {
> +				reg = <8>;
> +				label = "lan8";
> +				phy-handle = <&switch0phy8>;
> +			};
> +
> +			port@9 {
> +				reg = <9>;
> +				label = "wanp9";

Do these names correspond to some labeling? Ether the case or the silk
screen? wanp9 is an odd name. Is it connected to a header?

> +				phy-mode = "10gbase-kr";
> +				fixed-link {
> +					speed = <10000>;
> +					full-duplex;
> +				};
> +			};

  Andrew

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