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Message-ID: <mhng-b9e6d8f9-b9be-4651-9649-3378d227eae1@palmerdabbelt-glaptop>
Date: Thu, 07 Oct 2021 18:29:17 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: krzysztof.kozlowski@...onical.com, robh@...nel.org
CC: krzysztof.kozlowski@...onical.com, zong.li@...ive.com,
aou@...s.berkeley.edu, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-clk@...r.kernel.org,
robh+dt@...nel.org, devicetree@...r.kernel.org,
mturquette@...libre.com, Paul Walmsley <paul.walmsley@...ive.com>,
sboyd@...nel.org
Subject: Re: [PATCH] dt-bindings: clock: fu740-prci: add reset-cells
On Thu, 23 Sep 2021 09:59:32 PDT (-0700), robh@...nel.org wrote:
> On Mon, 20 Sep 2021 16:49:44 +0200, Krzysztof Kozlowski wrote:
>> The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line
>> provider so add respective reset-cells property to fix:
>>
>> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@...00000:
>> '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
>> ---
>> .../devicetree/bindings/clock/sifive/fu740-prci.yaml | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>
> Reviewed-by: Rob Herring <robh@...nel.org>
Acked-by: Palmer Dabbelt <palmerdabbelt@...gle.com>
For some reason I thought these went through your tree, LMK if you were
planning on having me take it through mine.
Thanks!
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