linux-kernel - Re: [net-next PATCH v2 11/15] dt-bindings: net: dsa: qca8k: Document qca,sgmii-enable-pll

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Sat, 9 Oct 2021 20:14:40 +0200
From:   Ansuel Smith <ansuelsmth@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [net-next PATCH v2 11/15] dt-bindings: net: dsa: qca8k: Document
 qca,sgmii-enable-pll

On Sat, Oct 09, 2021 at 07:13:58PM +0200, Andrew Lunn wrote:
> On Fri, Oct 08, 2021 at 02:22:21AM +0200, Ansuel Smith wrote:
> > Document qca,sgmii-enable-pll binding used in the CPU nodes to
> > enable SGMII PLL on MAC config.
> > 
> > Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> > ---
> >  Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> > index 208ee5bc1bbb..b9cccb657373 100644
> > --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> > +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> > @@ -50,6 +50,12 @@ A CPU port node has the following optional node:
> >                            managed entity. See
> >                            Documentation/devicetree/bindings/net/fixed-link.txt
> >                            for details.
> > +- qca,sgmii-enable-pll  : For SGMII CPU port, explicitly enable PLL, TX and RX
> > +                          chain along with Signal Detection.
> > +                          This should NOT be enabled for qca8327.
> 
> So how about -EINVAL for qca8327, and document it is not valid then.
>

I would also add a warning. With all the ported device we found pll
needed only qca8337. I will add the error but also report the reason as
we really don't know if it does exist a qca8327 device that needs pll.
In theory not but who knows.

> > +                          This can be required for qca8337 switch with revision 2.
> 
> Maybe add a warning if enabled with revision < 2? I would not make it
> an error, because there could be devices manufactured with a mixture
> or v1 and v2 silicon. Do you have any idea how wide spread v1 is?
> 

No idea about the revision and can't be recovered from the switch data
print on the chip. Will add a warning and put in the documentation that
we warn when an uncorrect revision is detected.

> > +                          With CPU port set to sgmii and qca8337 it is advised
> > +                          to set this unless a communication problem is observed.
> 
>   Andrew

-- 
	Ansuel