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Message-ID: <bac51fc71002bdd9c20b92571d3e1c7e@codeaurora.org>
Date: Tue, 12 Oct 2021 15:25:11 +0530
From: bgodavar@...eaurora.org
To: Matthias Kaehlcke <mka@...omium.org>
Cc: marcel@...tmann.org, bjorn.andersson@...aro.org,
johan.hedberg@...il.com, linux-kernel@...r.kernel.org,
linux-bluetooth@...r.kernel.org, hemantg@...eaurora.org,
linux-arm-msm@...r.kernel.org, rjliao@...eaurora.org,
pharish@...eaurora.org, abhishekpandit@...omium.org
Subject: Re: [PATCH v1 1/2] arm64: dts: qcom: sc7280: Add bluetooth node on
SC7280 IDP board
Hi Matthias,
On 2021-10-06 22:56, Matthias Kaehlcke wrote:
> On Wed, Oct 06, 2021 at 06:00:02PM +0530, Balakrishna Godavarthi wrote:
>> Add bluetooth SoC WCN6750 node for SC7280 IDP board.
>>
>> Signed-off-by: Balakrishna Godavarthi <bgodavar@...eaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 2 ++
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 31
>> +++++++++++++++++++++++++++++++
>> 2 files changed, 33 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index 64fc22a..d3f5393 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -17,6 +17,8 @@
>>
>> aliases {
>> serial0 = &uart5;
>> + bluetooth0 = &bluetooth;
>> + hsuart0 = &uart7;
>
> Sort aliases alphabetically.
>
> Also 'hsuart' should not be used, as Dmitry already pointed out on
> patch 2/2. I suppose it should be 'serial1', as in 'second serial
> port of the board'.
>
[Bala]: will update it.
>> };
>>
>> chosen {
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 272d5ca..05aa729 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -393,6 +393,24 @@
>> <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
>> pinctrl-names = "default", "sleep";
>> pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>,
>> <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
>> +
>> + bluetooth: wcn6750-bt {
>> + compatible = "qcom,wcn6750-bt";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&bt_en_default>;
>
> Do we also need a pinctrl entry for 'swctrl' ?
[Bala]: It is in input to APPS and op of BT SoC.
I don't think to set any configuration as BT SOC will take care of it.
>
>> + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; /* BT_EN */
>> + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; /* SW_CTRL */
>
> The comments aren't useful, the property names say the same.
>
[Bala]: will remove them
>> + vddio-supply = <&vreg_l19b_1p8>;
>> + vddaon-supply = <&vreg_s7b_0p9>;
>> + vddbtcxmx-supply = <&vreg_s7b_0p9>;
>> + vddrfacmn-supply = <&vreg_s7b_0p9>;
>> + vddrfa0p8-supply = <&vreg_s7b_0p9>;
>> + vddrfa1p7-supply = <&vreg_s1b_1p8>;
>> + vddrfa1p2-supply = <&vreg_s8b_1p2>;
>> + vddrfa2p2-supply = <&vreg_s1c_2p2>;
>> + vddasd-supply = <&vreg_l11c_2p8>;
>> + max-speed = <3200000>;
>> + };
>> };
>>
>> /* PINCTRL - additions to nodes defined in sc7280.dtsi */
>> @@ -504,6 +522,19 @@
>> */
>> bias-pull-up;
>> };
>> +
>> + bt_en_default: bt_en_default {
>
> bt_en: bt-en {
>
>> + pinmux {
>> + pins = "gpio85";
>> + function = "gpio";
>> + };
>> + pinconf {
>> + pins = "gpio85";
>> + drive-strength = <2>;
>> + output-low;
>> + bias-pull-down;
>> + };
>
> No pinmux & pinconf nodes, see configuration for other pins.
[Bala]: Thanks for pointing will update in next version
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