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Message-ID: <20211013201558.xwvsisgnrirbbckf@treble>
Date: Wed, 13 Oct 2021 13:15:58 -0700
From: Josh Poimboeuf <jpoimboe@...hat.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: x86@...nel.org, andrew.cooper3@...rix.com,
linux-kernel@...r.kernel.org, alexei.starovoitov@...il.com,
ndesaulniers@...gle.com
Subject: Re: [PATCH 3/9] x86/asm: Fix register order
On Wed, Oct 13, 2021 at 02:22:20PM +0200, Peter Zijlstra wrote:
> Ensure the register order is correct; this allows for easy translation
> between register number and trampoline and vice-versa.
>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
It would be wise to add a comment saying the register order is critical
to the functioning of the system and shouldn't be changed.
> ---
> arch/x86/include/asm/GEN-for-each-reg.h | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> --- a/arch/x86/include/asm/GEN-for-each-reg.h
> +++ b/arch/x86/include/asm/GEN-for-each-reg.h
> @@ -1,11 +1,12 @@
> #ifdef CONFIG_64BIT
> GEN(rax)
> -GEN(rbx)
> GEN(rcx)
> GEN(rdx)
> +GEN(rbx)
> +GEN(rsp)
> +GEN(rbp)
> GEN(rsi)
> GEN(rdi)
> -GEN(rbp)
> GEN(r8)
> GEN(r9)
> GEN(r10)
> @@ -16,10 +17,11 @@ GEN(r14)
> GEN(r15)
> #else
> GEN(eax)
> -GEN(ebx)
> GEN(ecx)
> GEN(edx)
> +GEN(ebx)
> +GEN(esp)
> +GEN(ebp)
> GEN(esi)
> GEN(edi)
> -GEN(ebp)
> #endif
--
Josh
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