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Message-ID: <87r1cn65qy.ffs@tglx>
Date: Thu, 14 Oct 2021 16:27:49 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Andi Kleen <ak@...ux.intel.com>,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@...ux.intel.com>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
x86@...nel.org, Paolo Bonzini <pbonzini@...hat.com>,
David Hildenbrand <david@...hat.com>,
Andrea Arcangeli <aarcange@...hat.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Juergen Gross <jgross@...e.com>, Deep Shah <sdeep@...are.com>,
VMware Inc <pv-drivers@...are.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>
Cc: Peter H Anvin <hpa@...or.com>, Dave Hansen <dave.hansen@...el.com>,
Tony Luck <tony.luck@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
Sean Christopherson <seanjc@...gle.com>,
Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v10 10/11] x86/tdx: Don't write CSTAR MSR on Intel
On Thu, Oct 14 2021 at 06:47, Andi Kleen wrote:
>>> - wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
>>> + /*
>>> + * CSTAR is not needed on Intel because it doesn't support
>>> + * 32bit SYSCALL, but only SYSENTER. On a TDX guest
>>> + * it leads to a #GP.
>> Sigh. Above you write it raises #VE, but now it's #GP !?!
>
>
> The unhandled #VE trap is handled like a #GP, which is then caught by
> the kernel wrmsr code.
That's completely irrelevant because that's an implementation detail of
the #VE handler. It raises #VE in the first place and that's unwanted no
matter what the #VE handler does with it. It could just pretent that
it's fine and move on.
Thanks,
tglx
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