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Message-ID: <YWjE0iQ6fDdJpDfT@google.com>
Date: Fri, 15 Oct 2021 00:01:22 +0000
From: Sean Christopherson <seanjc@...gle.com>
To: Yang Weijiang <weijiang.yang@...el.com>
Cc: pbonzini@...hat.com, jmattson@...gle.com, like.xu.linux@...il.com,
vkuznets@...hat.com, wei.w.wang@...el.com, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v8 15/15] KVM: x86/cpuid: Advise Arch LBR feature in CPUID
s/Advise/Advertise
On Tue, Aug 24, 2021, Yang Weijiang wrote:
> Add Arch LBR feature bit in CPU cap-mask to expose the feature.
> Only max LBR depth is supported for guest, and it's consistent
> with host Arch LBR settings.
>
> Co-developed-by: Like Xu <like.xu@...ux.intel.com>
> Signed-off-by: Like Xu <like.xu@...ux.intel.com>
> Signed-off-by: Yang Weijiang <weijiang.yang@...el.com>
> ---
> arch/x86/kvm/cpuid.c | 33 ++++++++++++++++++++++++++++++++-
> 1 file changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 03025eea1524..d98ebefd5d72 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -88,6 +88,16 @@ static int kvm_check_cpuid(struct kvm_cpuid_entry2 *entries, int nent)
> if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
> return -EINVAL;
> }
> + best = cpuid_entry2_find(entries, nent, 0x1c, 0);
> + if (best) {
> + unsigned int eax, ebx, ecx, edx;
> +
> + /* Reject user-space CPUID if depth is different from host's.*/
Why disallow this? I don't see why it would be illegal for userspace to specify
fewer LBRs, and KVM should darn well verify that any MSRs it's exposing to the
guest actually exist.
> + cpuid_count(0x1c, 0, &eax, &ebx, &ecx, &edx);
> +
> + if ((best->eax & 0xff) != BIT(fls(eax & 0xff) - 1))
> + return -EINVAL;
> + }
>
> return 0;
> }
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