[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <d5791e3697e6b78f0283c39dd58ba247a429d3c7.1634306198.git.naveennaidu479@gmail.com>
Date: Fri, 15 Oct 2021 20:09:05 +0530
From: Naveen Naidu <naveennaidu479@...il.com>
To: bhelgaas@...gle.com
Cc: Naveen Naidu <naveennaidu479@...il.com>,
linux-kernel-mentees@...ts.linuxfoundation.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
Toan Le <toan@...amperecomputing.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
linux-arm-kernel@...ts.infradead.org (moderated list:PCI DRIVER FOR
APPLIEDMICRO XGENE)
Subject: [PATCH v2 24/24] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error
Include PCI_ERROR_RESPONSE along with 0xffffffff in the comment to
specify a hardware error. This makes finding where MMIO read error
occurs easier.
Signed-off-by: Naveen Naidu <naveennaidu479@...il.com>
---
drivers/pci/controller/pci-xgene.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
index e64536047b65..4b10794e1ba1 100644
--- a/drivers/pci/controller/pci-xgene.c
+++ b/drivers/pci/controller/pci-xgene.c
@@ -176,10 +176,10 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
* Retry Status (CRS) logic: when CRS Software Visibility is
* enabled and we read the Vendor and Device ID of a non-existent
* device, the controller fabricates return data of 0xFFFF0001
- * ("device exists but is not ready") instead of 0xFFFFFFFF
- * ("device does not exist"). This causes the PCI core to retry
- * the read until it times out. Avoid this by not claiming to
- * support CRS SV.
+ * ("device exists but is not ready") instead of
+ * 0xFFFFFFFF (PCI_ERROR_RESPONSE) ("device does not exist"). This causes
+ * the PCI core to retry the read until it times out.
+ * Avoid this by not claiming to support CRS SV.
*/
if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) &&
((where & ~0x3) == XGENE_V1_PCI_EXP_CAP + PCI_EXP_RTCTL))
--
2.25.1
Powered by blists - more mailing lists