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Message-ID: <88147425-3137-53d9-3cba-2c52d8ac1556@gmail.com>
Date:   Sun, 17 Oct 2021 13:54:25 +0200
From:   Michael Straube <straube.linux@...il.com>
To:     Martin Kaiser <martin@...ser.cx>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     Larry Finger <Larry.Finger@...inger.net>,
        Phillip Potter <phil@...lpotter.co.uk>,
        linux-staging@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 6/8] staging: r8188eu: clean up Hal8188EPhyCfg.h

On 10/16/21 13:30, Martin Kaiser wrote:
> Remove a bunch of unused structs, enums and defines
> from Hal8188EPhyCfg.h.
> 
> Signed-off-by: Martin Kaiser <martin@...ser.cx>
> ---
>   .../staging/r8188eu/include/Hal8188EPhyCfg.h  | 59 -------------------
>   1 file changed, 59 deletions(-)
> 
> diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
> index feae0b32cac6..58377edf724d 100644
> --- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
> +++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
> @@ -21,23 +21,6 @@
>   /*--------------------------Define Parameters-------------------------------*/
>   
>   /*------------------------------Define structure----------------------------*/
> -enum sw_chnl_cmd_id {
> -	CmdID_End,
> -	CmdID_SetTxPowerLevel,
> -	CmdID_BBRegWrite10,
> -	CmdID_WritePortUlong,
> -	CmdID_WritePortUshort,
> -	CmdID_WritePortUchar,
> -	CmdID_RF_WriteReg,
> -};
> -
> -/* 1. Switch channel related */
> -struct sw_chnl_cmd {
> -	enum sw_chnl_cmd_id CmdID;
> -	u32 Para1;
> -	u32 Para2;
> -	u32 msDelay;
> -};
>   
>   enum hw90_block {
>   	HW90_BLOCK_MAC = 0,
> @@ -73,16 +56,6 @@ enum wireless_mode {
>   	WIRELESS_MODE_N_24G		= BIT(3),
>   };
>   
> -enum phy_rate_tx_offset_area {
> -	RA_OFFSET_LEGACY_OFDM1,
> -	RA_OFFSET_LEGACY_OFDM2,
> -	RA_OFFSET_HT_OFDM1,
> -	RA_OFFSET_HT_OFDM2,
> -	RA_OFFSET_HT_OFDM3,
> -	RA_OFFSET_HT_OFDM4,
> -	RA_OFFSET_HT_CCK,
> -};
> -
>   /* BB/RF related */
>   enum RF_TYPE_8190P {
>   	RF_TYPE_MIN,		/*  0 */
> @@ -141,24 +114,6 @@ struct bb_reg_def {
>   				 * Path A and B */
>   };
>   
> -struct ant_sel_ofdm {
> -	u32 r_tx_antenna:4;
> -	u32 r_ant_l:4;
> -	u32 r_ant_non_ht:4;
> -	u32 r_ant_ht1:4;
> -	u32 r_ant_ht2:4;
> -	u32 r_ant_ht_s1:4;
> -	u32 r_ant_non_ht_s1:4;
> -	u32 OFDM_TXSC:2;
> -	u32 reserved:2;
> -};
> -
> -struct ant_sel_cck {
> -	u8 r_cckrx_enable_2:2;
> -	u8 r_cckrx_enable:2;
> -	u8 r_ccktx_enable:4;
> -};
> -
>   /*------------------------------Define structure----------------------------*/
>   
>   /*------------------------Export global variable----------------------------*/
> @@ -208,18 +163,4 @@ void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
>   #define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data)	\
>   	rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data))
>   
> -#define PHY_SetMacReg	PHY_SetBBReg
> -
> -#define	SIC_HW_SUPPORT			0
> -
> -#define	SIC_MAX_POLL_CNT		5
> -
> -#define	SIC_CMD_READY			0
> -#define	SIC_CMD_WRITE			1
> -#define	SIC_CMD_READ			2
> -
> -#define	SIC_CMD_REG			0x1EB		/*  1byte */
> -#define	SIC_ADDR_REG			0x1E8		/*  1b9~1ba, 2 bytes */
> -#define	SIC_DATA_REG			0x1EC		/*  1bc~1bf */
> -
>   #endif	/*  __INC_HAL8192CPHYCFG_H */
> 


Acked-by: Michael Straube <straube.linux@...il.com>

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