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Date: Sun, 17 Oct 2021 21:49:16 +0200 From: Thomas Gleixner <tglx@...utronix.de> To: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, x86@...nel.org, Paolo Bonzini <pbonzini@...hat.com>, David Hildenbrand <david@...hat.com>, Andrea Arcangeli <aarcange@...hat.com>, Josh Poimboeuf <jpoimboe@...hat.com>, "H . Peter Anvin" <hpa@...or.com> Cc: Dave Hansen <dave.hansen@...el.com>, Tony Luck <tony.luck@...el.com>, Dan Williams <dan.j.williams@...el.com>, Andi Kleen <ak@...ux.intel.com>, Kirill Shutemov <kirill.shutemov@...ux.intel.com>, Sean Christopherson <seanjc@...gle.com>, Kuppuswamy Sathyanarayanan <knsathya@...nel.org>, Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>, linux-kernel@...r.kernel.org Subject: Re: [PATCH v7 2/6] x86/boot: Avoid #VE during boot for TDX platforms On Tue, Oct 05 2021 at 16:05, Kuppuswamy Sathyanarayanan wrote: > > /* Enable PAE and LA57 (if required) paging modes */ > - movl $X86_CR4_PAE, %eax > + movl %cr4, %eax > + /* > + * Clear all bits except CR4.MCE, which is preserved. > + * Clearing CR4.MCE will #VE in TDX guests. Sure. But what's the side effect for non TDX? > + */ > + andl $X86_CR4_MCE, %eax > + orl $X86_CR4_PAE, %eax > testl %edx, %edx > jz 1f > orl $X86_CR4_LA57, %eax > @@ -662,8 +670,8 @@ SYM_CODE_START(trampoline_32bit_src) > pushl $__KERNEL_CS > pushl %eax > > - /* Enable paging again */ > - movl $(X86_CR0_PG | X86_CR0_PE), %eax > + /* Enable paging again. Avoid clearing X86_CR0_NE for TDX */ Ditto. The changelog is not providing any information either. Also instead of '... TDX' all over the place please add sensible defines and add comments to those in one place. There is really no need to sprinkle TDX all over the place. Thanks, tglx
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