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Message-ID: <YW5OTMz+x8zrsqkF@Dennis-MBP.local>
Date: Tue, 19 Oct 2021 12:49:16 +0800
From: Xuesong Chen <xuesong.chen@...ux.alibaba.com>
To: catalin.marinas@....com, lorenzo.pieralisi@....com,
james.morse@....com, will@...nel.org, rafael@...nel.org,
tony.luck@...el.com, bp@...en8.de, mingo@...nel.org,
bhelgaas@...gle.com
Cc: linux-pci@...r.kernel.org, linux-acpi@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
xuesong.chen@...ux.alibaba.com
Subject: [PATCH v3 0/2] PCI MCFG consolidation and APEI resource filterin
Hello All,
The idea of this patch set is very strainforward, it's somehow a refactor
of the original codes to share some ones that they should do. Based on that,
we can resolve the MCFG address access issue in APEI module on x86 in a
command way instead of the current arch-dependent one, while this issue also
does happen on ARM64 platform.
The logic of the series is very clear(IMO it's even time-wasting to explain that):
Patch #1: Escalating the 'pci_mmcfg_list' and 'pci_mmcfg_region' to the
pci.[c,h] which will shared by all the arches. A common sense, in some degree.
Patch #2: Since the 'pci_mmcfg_list' now can be shared across all arches,
the arch-specific fix method can be replaced by the new solution naturally.
Now the v3 patch has been finalized, can we move forward to the next step? -
either give the concerns/objections or pick it up.
Xuesong Chen (2):
PCI: MCFG: Consolidate the separate PCI MCFG table entry list
ACPI: APEI: Filter the PCI MCFG address with an arch-agnostic method
arch/x86/include/asm/pci_x86.h | 17 +---------------
arch/x86/pci/mmconfig-shared.c | 30 ----------------------------
drivers/acpi/apei/apei-base.c | 45 ++++++++++++++++++++++++++++--------------
drivers/acpi/pci_mcfg.c | 34 ++++++++++++-------------------
drivers/pci/pci.c | 2 ++
include/linux/pci.h | 17 ++++++++++++++++
6 files changed, 63 insertions(+), 82 deletions(-)
--
1.8.3.1
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