lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20211023111409.30463-4-flora.fu@mediatek.com>
Date:   Sat, 23 Oct 2021 19:13:59 +0800
From:   Flora Fu <flora.fu@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Sumit Semwal <sumit.semwal@...aro.org>
CC:     <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-media@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <linaro-mm-sig@...ts.linaro.org>, Flora Fu <flora.fu@...iatek.com>,
        Yong Wu <yong.wu@...iatek.com>,
        Pi-Cheng Chen <pi-cheng.chen@...iatek.com>
Subject: [RFC 03/13] dt-bindings: soc: mediatek: apusys: Add new document for APU tinysys

Add new document for APU tinysys.

Signed-off-by: Flora Fu <flora.fu@...iatek.com>
---
 .../soc/mediatek/mediatek,apu-rv.yaml         | 140 ++++++++++++++++++
 1 file changed, 140 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-rv.yaml

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-rv.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-rv.yaml
new file mode 100644
index 000000000000..ee0ff5d656e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-rv.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# # Copyright 2021 MediaTek Inc.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/mediatek/mediatek,apu-rv.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Mediatek APU Power
+
+description: |
+  APU integrated subsystem having MD32RV33 (MD32) that runs tinysys
+  The tinsys is running on a micro processor in APU.
+  Its firmware is load and boot from Kernel side. Kernel and tinysys use
+  IPI to tx/rx messages.
+
+maintainers:
+  - Flora Fu <flora.fu@...iatek.com>
+
+properties:
+  compatible:
+    enum:
+      - mediatek,mt8192-apusys-rv
+
+  reg:
+    minItems: 1
+
+  reg-names:
+    minItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  iommus:
+    maxItems: 1
+
+  interrupts:
+    description: List of interrupts.
+
+  interrupt-names:
+    description: Name list of interrupts.
+
+  mediatek,apusys-power:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: |
+      phandle to the device containing the apusys-power handle.
+
+  apu_ctrl:
+    description: handle the ipi state, time sync and deep idle message.
+    type: object
+
+    properties:
+      compatible:
+        const: "mediatek,apu-ctrl-rpmsg"
+
+    required:
+      - compatible
+
+    additionalProperties: false
+
+  apu_pwr_tx:
+    description: handle the message trigger from AP side to tinysys.
+    type: object
+
+    properties:
+      compatible:
+        const: "mediatek,apupwr-tx-rpmsg"
+
+    required:
+      - compatible
+
+    additionalProperties: false
+
+  apu_pwr_rx:
+    description: handle the message trigger from tinysys to AP side.
+    type: object
+
+    properties:
+      compatible:
+        const: "mediatek,apupwr-rx-rpmsg"
+
+    required:
+      - compatible
+
+    additionalProperties: false
+
+  apu_mdw_rpmsg:
+    description: handle the middleware messages.
+    type: object
+
+    properties:
+      compatible:
+        const: "mediatek,apu-mdw-rpmsg"
+
+    required:
+      - compatible
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - interrupts
+  - mediatek,apusys-power
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8192-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/memory/mt8192-larb-port.h>
+
+    apusys_rv@...01000 {
+      compatible = "mediatek,mt8192-apusys-rv";
+      reg = <0x19000000 0x1000>,
+            <0x19001000 0x1000>;
+      reg-names = "apu_mbox",
+                  "md32_sysctrl";
+      mediatek,apusys-power = <&apusys_power>;
+      power-domains = <&apuspm 0>;
+      iommus = <&iommu_apu IOMMU_PORT_APU_DATA>;
+      interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>,
+                   <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH 0>;
+      interrupt-names = "apu_wdt",
+                        "mbox0_irq";
+      apu_ctrl {
+        compatible = "mediatek,apu-ctrl-rpmsg";
+      };
+      apu_pwr_tx {
+        compatible = "mediatek,apupwr-tx-rpmsg";
+      };
+      apu_pwr_rx {
+        compatible = "mediatek,apupwr-rx-rpmsg";
+      };
+      apu_mdw_rpmsg {
+        compatible = "mediatek,apu-mdw-rpmsg";
+      };
+    };
-- 
2.18.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ