lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 26 Oct 2021 22:59:01 +0200
From:   Aleksander Jan Bajkowski <olek2@...pl>
To:     hauke@...ke-m.de, davem@...emloft.net, kuba@...nel.org,
        robh+dt@...nel.org, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Cc:     Aleksander Jan Bajkowski <olek2@...pl>
Subject: [PATCH 1/2] net: lantiq_xrx200: Hardcode the burst length value

All SoCs with this IP core support 8 burst length. Hauke
suggested to hardcode this value and simplify the driver.

Link: https://lkml.org/lkml/2021/9/14/1533
Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>
---
 drivers/net/ethernet/lantiq_xrx200.c | 21 ++++-----------------
 1 file changed, 4 insertions(+), 17 deletions(-)

diff --git a/drivers/net/ethernet/lantiq_xrx200.c b/drivers/net/ethernet/lantiq_xrx200.c
index ecf1e11d9b91..0da09ea81980 100644
--- a/drivers/net/ethernet/lantiq_xrx200.c
+++ b/drivers/net/ethernet/lantiq_xrx200.c
@@ -25,6 +25,7 @@
 #define XRX200_DMA_DATA_LEN	(SZ_64K - 1)
 #define XRX200_DMA_RX		0
 #define XRX200_DMA_TX		1
+#define XRX200_DMA_BURST_LEN	8
 
 /* cpu port mac */
 #define PMAC_RX_IPG		0x0024
@@ -73,9 +74,6 @@ struct xrx200_priv {
 	struct net_device *net_dev;
 	struct device *dev;
 
-	int tx_burst_len;
-	int rx_burst_len;
-
 	__iomem void *pmac_reg;
 };
 
@@ -323,7 +321,7 @@ static netdev_tx_t xrx200_start_xmit(struct sk_buff *skb,
 		goto err_drop;
 
 	/* dma needs to start on a burst length value aligned address */
-	byte_offset = mapping % (priv->tx_burst_len * 4);
+	byte_offset = mapping % (XRX200_DMA_BURST_LEN * 4);
 
 	desc->addr = mapping - byte_offset;
 	/* Make sure the address is written before we give it to HW */
@@ -422,7 +420,8 @@ static int xrx200_dma_init(struct xrx200_priv *priv)
 	int ret = 0;
 	int i;
 
-	ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
+	ltq_dma_init_port(DMA_PORT_ETOP, XRX200_DMA_BURST_LEN,
+			  XRX200_DMA_BURST_LEN);
 
 	ch_rx->dma.nr = XRX200_DMA_RX;
 	ch_rx->dma.dev = priv->dev;
@@ -531,18 +530,6 @@ static int xrx200_probe(struct platform_device *pdev)
 	if (err)
 		eth_hw_addr_random(net_dev);
 
-	err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
-	if (err < 0) {
-		dev_err(dev, "unable to read tx-burst-length property\n");
-		return err;
-	}
-
-	err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
-	if (err < 0) {
-		dev_err(dev, "unable to read rx-burst-length property\n");
-		return err;
-	}
-
 	/* bring up the dma engine and IP core */
 	err = xrx200_dma_init(priv);
 	if (err)
-- 
2.30.2

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ