linux-kernel - Re: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt

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Message-ID: <f18b283f-67b2-6847-036b-e27cc5a327db@gmail.com>
Date:   Wed, 27 Oct 2021 22:28:33 +0200
From:   Rafał Miłecki <zajec5@...il.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     chunkeey@...il.com, mnhagan88@...il.com,
        Hauke Mehrtens <hauke@...ke-m.de>,
        "maintainer:BROADCOM BCM5301X ARM ARCHITECTURE" 
        <bcm-kernel-feedback-list@...adcom.com>,
        Rob Herring <robh+dt@...nel.org>,
        Jon Mason <jonmason@...adcom.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt

On 27.10.2021 21:37, Florian Fainelli wrote:
> The I2C interrupt controller line is off by 32 because the datasheet
> describes interrupt inputs into the GIC which are for Shared Peripheral
> Interrupts and are starting at offset 32. The ARM GIC binding expects
> the SPI interrupts to be numbered from 0 relative to the SPI base.
> 
> Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT")
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>

Thanks for fixing that. I don't have any device utilzing I2C and so
never notice that issue.