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Date:   Tue, 2 Nov 2021 11:48:40 +0100
From:   Robert Foss <robert.foss@...aro.org>
To:     Xin Ji <xji@...logixsemi.com>
Cc:     Jitao Shi <jitao.shi@...iatek.com>,
        Andrzej Hajda <a.hajda@...sung.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        David Airlie <airlied@...ux.ie>,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, ck.hu@...iatek.com,
        stonea168@....com, huijuan.xie@...iatek.com,
        rex-bc.chen@...iatek.com, shuijing.li@...iatek.com
Subject: Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned
 to avoid screen shift

On Tue, 2 Nov 2021 at 02:56, Xin Ji <xji@...logixsemi.com> wrote:
>
> On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote:
> > Hi Xin,
> >
> > Please help to review the changes in anx7625.c
> >
> > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote:
> > > This device requires the packets on lanes aligned at the end to fix
> > > screen shift or scroll.
> > >
> > > Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> > > ---
> > >  drivers/gpu/drm/bridge/analogix/anx7625.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > index 14d73fb1dd15..d76fb63fa9f7 100644
> > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct
> > > anx7625_data *ctx)
> > >             MIPI_DSI_MODE_VIDEO_SYNC_PULSE  |
> > >             MIPI_DSI_MODE_NO_EOT_PACKET     |
> > >             MIPI_DSI_MODE_VIDEO_HSE;
> > > +   dsi->hs_packet_end_aligned = true;
>
> Looks good, it's OK for me.
> Reviewed-by: Xin Ji <xji@...logixsemi.com>

Acked-by: Robert Foss <robert.foss@...aro.org>

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