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Message-ID: <YYJLSCE9ak2I/9A/@ninjato>
Date: Wed, 3 Nov 2021 09:41:44 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Rob Herring <robh+dt@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Mark Brown <broonie@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Sergei Shtylyov <sergei.shtylyov@...il.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
linux-mtd@...ts.infradead.org,
linux-spi <linux-spi@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 7/7] memory: renesas-rpc-if: Add support for RZ/G2L
Hi Prabhakar,
> Oops I missed that, does the below look good?
Yes, only a minor nit.
>
> #define RPCIF_PHYADD_ADD_MD 0x00
> #define RPCIF_PHYADD_ADD_RDLSEL 0x22
> #define RPCIF_PHYADD_ADD_FDLSEL 0x24
> #define RPCIF_PHYADD_ADD_RDLMON 0x26
> #define RPCIF_PHYADD_ADD_FDLMON 0x28
>
> #define RPCIF_PHYADD_ACCEN BIT(31)
> #define RPCIF_PHYADD_RW BIT(30)
Maybe we could leave this because we don't use it? You decide.
> > + regmap_write(rpc->regmap, RPCIF_PHYWR, 0x00000030);
> > + regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000032);
> >
> For the above do you have any suggestions? As I couldn't find any
> details about it or shall I just go with magic numbers for now?
Ack. I couldn't find docs about these as well. I suggest to add a
comment where this value came from. We can ask the BSP and/or HW team
for details and update this pair incrementally.
> thanks, once we agree upon above I shall re-spin v3.
Cool, looking forward to it!
Happy hacking,
Wolfram
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