linux-kernel - 答复: [PATCH v4 00/10] Add Sunplus SP7021 SoC Support

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Message-ID: <98b3e76029bb4d7096de462c46bca08d@cqplus1.com>
Date:   Thu, 4 Nov 2021 08:35:00 +0000
From:   qinjian[覃健] <qinjian@...lus1.com>
To:     Marc Zyngier <maz@...nel.org>
CC:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        Wells Lu �畏简v <wells.lu@...plus.com>
Subject: 答复: [PATCH v4 00/10] Add Sunplus SP7021 SoC Support

Marc,

Got it. Thank you for reminding me.
I'm sorry for the previous mistake.


> -----邮件原件-----
> 发件人: Marc Zyngier <maz@...nel.org>
> 发送时间: 2021年11月4日 16:23
> 收件人: qinjian[覃健] <qinjian@...lus1.com>
> 抄送: robh+dt@...nel.org; mturquette@...libre.com; sboyd@...nel.org; p.zabel@...gutronix.de; linux@...linux.org.uk;
> broonie@...nel.org; arnd@...db.de; linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> linux-clk@...r.kernel.org; Wells Lu �畏简v <wells.lu@...plus.com>
> 主题: Re: [PATCH v4 00/10] Add Sunplus SP7021 SoC Support
> 
> Qin,
> 
> On Thu, 04 Nov 2021 02:56:57 +0000,
> Qin Jian <qinjian@...lus1.com> wrote:
> >
> > This patch series add Sunplus SP7021 SoC support.
> >
> > Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many
> > peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a
> > single chip. It is designed for industrial control.
> >
> > SP7021 consists of two chips (dies) in a package. One is called C-chip
> > (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level
> > process (22 nm) for high performance computing. The other is called P-
> > chip (peripheral chip). It has many peripherals and an ARM A926 added
> > especially for real-time control. P-chip is made for customers. It adopts
> > low-level process (ex: 0.11 um) to reduce cost.
> 
> That's the 3rd version of this series since Friday, two of them during
> the merge window. All you are achieving is to actually *delay* the
> review process (at this rate, I'll probably wait until v11 before I
> take another look at it).
> 
> Documentation/process/submitting-patches.rst states it clearly:
> 
> <quote>
> Wait for a minimum of one week before resubmitting
> </quote>
> 
> So please leave people the time to actually do a good review job, and
> take the opportunity to review your own patches before posting them
> again.
> 
> Thanks,
> 
> 	M.
> 
> --
> Without deviation from the norm, progress is not possible.