linux-kernel - Re: [PATCH] cpufreq: intel_pstate: Fix unchecked MSR 0x773 access

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Message-ID: <20211104093019.60c0e157@gandalf.local.home>
Date:   Thu, 4 Nov 2021 09:30:19 -0400
From:   Steven Rostedt <rostedt@...dmis.org>
To:     Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc:     rafael@...nel.org, viresh.kumar@...aro.org,
        linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
        torvalds@...ux-foundation.org, lenb@...nel.org
Subject: Re: [PATCH] cpufreq: intel_pstate: Fix unchecked MSR 0x773 access

On Wed,  3 Nov 2021 22:19:25 -0700
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com> wrote:

> It is possible that on some platforms HWP interrupts are disabled. In
> that case accessing MSR 0x773 will result in warning.
> 
> So check X86_FEATURE_HWP_NOTIFY feature to access MSR 0x773. The other
> places in code where this MSR is accessed, already checks this feature
> except during disable path called during cpufreq offline and suspend
> callbacks.
> 
> Fixes: 57577c996d73 ("cpufreq: intel_pstate: Process HWP Guaranteed change notification")
> Reported-by: Steven Rostedt <rostedt@...dmis.org>

I added this patch on top of the above commit and I verified that the issue
goes away. And just to confirm, I removed the patch, and the issue
reappeared.

Tested-by: Steven Rostedt (VMware) <rostedt@...dmis.org>

-- Steve


> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
> ---
>  drivers/cpufreq/intel_pstate.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index 349ddbaef796..1e6898dc76b6 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -1620,6 +1620,9 @@ static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)
>  {
>  	unsigned long flags;
>  
> +	if (!boot_cpu_has(X86_FEATURE_HWP_NOTIFY))
> +		return;
> +
>  	/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */
>  	wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
>