linux-kernel - Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Sun, 7 Nov 2021 15:12:51 +0800
From:   Wei Fu <wefu@...hat.com>
To:     Guo Ren <guoren@...nel.org>
Cc:     Christoph Hellwig <hch@....de>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Anup Patel <Anup.Patel@....com>,
        Atish Patra <Atish.Patra@....com>,
        Christoph Müllner <christoph.muellner@...ll.eu>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        liush <liush@...winnertech.com>,
        Wei Wu (吴伟) <lazyparser@...il.com>,
        Drew Fustini <drew@...gleboard.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        taiten.peng@...onical.com,
        Aniket Ponkshe <aniket.ponkshe@...onical.com>,
        Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
        Gordan Markus <gordan.markus@...onical.com>,
        Guo Ren <guoren@...ux.alibaba.com>,
        Arnd Bergmann <arnd@...db.de>, Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime@...no.tech>,
        Daniel Lustig <dlustig@...dia.com>,
        Greg Favor <gfavor@...tanamicro.com>,
        Andrea Mondelli <andrea.mondelli@...wei.com>,
        Jonathan Behrens <behrensj@....edu>,
        "Xinhaoqu (Freddie)" <xinhaoqu@...wei.com>,
        Bill Huffman <huffman@...ence.com>,
        Nick Kossifidis <mick@....forth.gr>,
        Allen Baum <allen.baum@...erantotech.com>,
        Josh Scheid <jscheid@...tanamicro.com>,
        Richard Trauben <rtrauben@...il.com>
Subject: Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports

HI Guo， Christoph,

Thanks for your suggestion.

On Tue, Nov 2, 2021 at 4:51 PM Guo Ren <guoren@...nel.org> wrote:
>
> Thx Christoph,
>
> On Tue, Nov 2, 2021 at 1:59 PM Christoph Hellwig <hch@....de> wrote:
> >
> > On Tue, Nov 02, 2021 at 10:07:58AM +0800, Guo Ren wrote:
> > >
> > > To separate MMU & no-MMU clearly, I suggest fuwei add
> > > #if defined(CONFIG_64BIT) && defined(CONFIG_MMU)
> >
> > Actually - for documentation purposes a new CONFIG_RISCV_SVPBMT that
> > depends on 64BIT && MMU would probably much better as it clearly
> > documents the intent here.
> Okay

How about

config RISCV_SVPBMT
bool
depends on 64BIT && MMU
default y


>
>
> --
> Best Regards
>  Guo Ren
>
> ML: https://lore.kernel.org/linux-csky/
>