linux-kernel - Re: [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports

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Message-ID: <CA+YCwKntSMv56zFP9wzysbQAWixDGA1R4Nyrmhc4Tn=_Byc+TQ@mail.gmail.com>
Date:   Sun, 7 Nov 2021 15:23:00 +0800
From:   Wei Fu <wefu@...hat.com>
To:     Christoph Hellwig <hch@....de>
Cc:     Christoph Hellwig <hch@...radead.org>,
        Anup Patel <anup.patel@....com>,
        Atish Patra <atish.patra@....com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Guo Ren <guoren@...nel.org>,
        Christoph Müllner <christoph.muellner@...ll.eu>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        Liu Shaohua <liush@...winnertech.com>,
        Wei Wu (吴伟) <lazyparser@...il.com>,
        Drew Fustini <drew@...gleboard.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        taiten.peng@...onical.com,
        Aniket Ponkshe <aniket.ponkshe@...onical.com>,
        Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
        Gordan Markus <gordan.markus@...onical.com>,
        Guo Ren <guoren@...ux.alibaba.com>,
        Arnd Bergmann <arnd@...db.de>, Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime@...no.tech>,
        Daniel Lustig <dlustig@...dia.com>,
        Greg Favor <gfavor@...tanamicro.com>,
        Andrea Mondelli <andrea.mondelli@...wei.com>,
        Jonathan Behrens <behrensj@....edu>,
        Xinhaoqu <xinhaoqu@...wei.com>,
        Bill Huffman <huffman@...ence.com>,
        Nick Kossifidis <mick@....forth.gr>,
        Allen Baum <allen.baum@...erantotech.com>,
        Josh Scheid <jscheid@...tanamicro.com>,
        Richard Trauben <rtrauben@...il.com>
Subject: Re: [RESEND PATCH V3 2/2] riscv: add RISC-V Svpbmt extension supports

Hi Chistoph,

On Tue, Nov 2, 2021 at 2:07 PM Christoph Hellwig <hch@....de> wrote:
>
> On Mon, Oct 25, 2021 at 06:55:09PM +0800, Wei Fu wrote:
> > How about this macro:
> > #define _SVPBMT_PMA         0x0UL
> > #define _SVPBMT_NC         BIT(61)
> > #define _SVPBMT_IO         BIT(62)
> > #define _SVPBMT_MASK         GENMASK(62, 61)
>
> Personally I find these macros highly confusing.
>
> #define _SVPBMT_PMA     0UL
> #define _SVPBMT_NC      (1UL << 61)
> #define _SVPBMT_IO      (1UL << 62).
> #define _SVPBMT_MASK    (_SVPBMT_NC  | _SVPBMT_IO)
>
> is much eaier to follow.  Note that we can probably just drop
> _SVPBMT_PMA entirely to make this even more readable.

sure, I can do this , thanks

>
> > > Also why not use the standard names for these _PAGE bits used by
> > > most other architectures?
> >
> > Which names are you suggesting? Would you mind providing an example ?
> > _PAGE_BIT_   for _PAGE_KERNEL_ ??
>
> Use _PAGE_NOCACHE for _SVPBMT_NC, and _PAGE_IO for _SVPBMT_IO.

OK, Sure , will do

Great thanks

>