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Message-ID: <CAMuHMdUpGjyN-+u+THiNJ-Ouzp8vRTeg6u23P1BoF8Gi4aSnWQ@mail.gmail.com>
Date: Tue, 9 Nov 2021 09:43:07 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Jassi Brar <jassisinghbrar@...il.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Mark Brown <broonie@...nel.org>,
Greg KH <gregkh@...uxfoundation.org>,
Lewis Hanly <lewis.hanly@...rochip.com>,
daire.mcnamara@...rochip.com, Atish Patra <atish.patra@....com>,
ivan.griffin@...rochip.com,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux I2C <linux-i2c@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Linux Crypto Mailing List <linux-crypto@...r.kernel.org>,
linux-rtc@...r.kernel.org, linux-spi <linux-spi@...r.kernel.org>,
USB list <linux-usb@...r.kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Bin Meng <bin.meng@...driver.com>
Subject: Re: [PATCH 09/13] dt-bindings: gpio: add bindings for microchip mpfs gpio
Hi Conor,
On Mon, Nov 8, 2021 at 4:07 PM <conor.dooley@...rochip.com> wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Add device tree bindings for the gpio controller on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
> @@ -0,0 +1,108 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip MPFS GPIO Controller Device Tree Bindings
> +
> +maintainers:
> + - Conor Dooley <conor.dooley@...rochip.com>
> +
> +description: |
> + This GPIO controller is found on the Microchip PolarFire SoC.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - microchip,mpfs-gpio
> + - microsemi,ms-pf-mss-gpio
What's the difference between these two?
If there is a difference, please add a comment "# <explanation>"
to each entry.
If there is no difference, please drop the second one.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + description:
> + Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
> + minItems: 1
> + maxItems: 32
> +
> + interrupt-controller: true
> +
> + clocks:
> + maxItems: 1
> +
> + "#gpio-cells":
> + const: 2
> +
> + ngpios:
> + description:
> + The number of GPIOs available.
> + minimum: 1
> + maximum: 32
> + default: 32
> +
> + gpio-controller: true
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - "#interrupt-cells"
> + - "#gpio-cells"
> + - gpio-controller
> + - clocks
Any specific reason interrupt-controller is not required?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include "dt-bindings/clock/microchip,mpfs-clock.h"
> + #include "dt-bindings/interrupt-controller/microchip,mpfs-plic.h"
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
Just drop these two...
> + gpio2: gpio@...22000 {
> + compatible = "microchip,mpfs-gpio";
> + reg = <0x0 0x20122000 0x0 0x1000>;
... and the zeros here.
> + clocks = <&clkcfg CLK_GPIO2>;
> + interrupt-parent = <&plic>;
> + interrupts = <PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT
> + PLIC_INT_GPIO2_NON_DIRECT>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + status = "disabled";
Please drop this.
> + };
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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