linux-kernel - Re: [PATCH 04/13] dt-bindings: riscv: update microchip polarfire binds

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <198eaf69-8f85-50a7-192e-5900776d044b@microchip.com>
Date:   Tue, 9 Nov 2021 12:08:04 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <geert@...ux-m68k.org>
CC:     <linus.walleij@...aro.org>, <bgolaszewski@...libre.com>,
        <robh+dt@...nel.org>, <jassisinghbrar@...il.com>,
        <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <a.zummo@...ertech.it>,
        <alexandre.belloni@...tlin.com>, <broonie@...nel.org>,
        <gregkh@...uxfoundation.org>, <Lewis.Hanly@...rochip.com>,
        <Daire.McNamara@...rochip.com>, <atish.patra@....com>,
        <Ivan.Griffin@...rochip.com>, <linux-gpio@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-i2c@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-crypto@...r.kernel.org>, <linux-rtc@...r.kernel.org>,
        <linux-spi@...r.kernel.org>, <linux-usb@...r.kernel.org>,
        <krzysztof.kozlowski@...onical.com>, <bin.meng@...driver.com>
Subject: Re: [PATCH 04/13] dt-bindings: riscv: update microchip polarfire
 binds

On 09/11/2021 08:34, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Conor,
> 
> On Mon, Nov 8, 2021 at 4:06 PM <conor.dooley@...rochip.com> wrote:
>> From: Conor Dooley <conor.dooley@...rochip.com>
>>
>> Add mpfs-soc to clear undocumented binding warning
>>
>> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>> ---
>>   Documentation/devicetree/bindings/riscv/microchip.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml
>> index 3f981e897126..1ff7a5224bbc 100644
>> --- a/Documentation/devicetree/bindings/riscv/microchip.yaml
>> +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml
>> @@ -21,6 +21,7 @@ properties:
>>         - enum:
>>             - microchip,mpfs-icicle-kit
>>         - const: microchip,mpfs
>> +      - const: microchip,mpfs-soc
> 
> Doesn't the "s" in "mpfs" already stand for "soc"?
not wrong, but using mpf-soc would be confusing since "mpf" is the part 
name for the non soc fpga. is it fine to just reuse "mpfs" for the dtsi 
overall compatible and for the soc subsection?
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
>