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Message-ID: <202111131342.7j6cw4Uh-lkp@intel.com>
Date:   Sat, 13 Nov 2021 13:00:45 +0800
From:   kernel test robot <lkp@...el.com>
To:     Rob Herring <robh@...nel.org>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: [robh:arm64-user-perf-event-v11 4/5]
 arch/arm64/kernel/perf_event.c:1191:5: warning: no previous prototype for
 'armv8pmu_proc_user_access_handler'

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git arm64-user-perf-event-v11
head:   a5385068d760ce1abfab2609fdb662164f12c494
commit: e4f5fa6593ffb8f5e5c167566839f7ecf97628e2 [4/5] arm64: perf: Enable PMU counter userspace access for perf event
config: arm64-randconfig-p001-20211019 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?id=e4f5fa6593ffb8f5e5c167566839f7ecf97628e2
        git remote add robh https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
        git fetch --no-tags robh arm64-user-perf-event-v11
        git checkout e4f5fa6593ffb8f5e5c167566839f7ecf97628e2
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:143:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD'
     143 |         [C(L1D)][C(OP_READ)][C(RESULT_MISS)]    = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:111:65: warning: initialized field overwritten [-Woverride-init]
     111 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR                       0x41
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:144:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR'
     144 |         [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:111:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[0][1][0]')
     111 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR                       0x41
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:144:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR'
     144 |         [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:113:65: warning: initialized field overwritten [-Woverride-init]
     113 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR                0x43
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:145:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR'
     145 |         [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)]   = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:113:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[0][1][1]')
     113 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR                0x43
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:145:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR'
     145 |         [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)]   = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:122:65: warning: initialized field overwritten [-Woverride-init]
     122 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD                         0x4E
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:147:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD'
     147 |         [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:122:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][0][0]')
     122 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD                         0x4E
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:147:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD'
     147 |         [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:123:65: warning: initialized field overwritten [-Woverride-init]
     123 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR                         0x4F
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:148:52: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR'
     148 |         [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
         |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:123:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][1][0]')
     123 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR                         0x4F
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:148:52: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR'
     148 |         [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
         |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:120:65: warning: initialized field overwritten [-Woverride-init]
     120 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD                  0x4C
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:149:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD'
     149 |         [C(DTLB)][C(OP_READ)][C(RESULT_MISS)]   = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:120:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][0][1]')
     120 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD                  0x4C
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:149:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD'
     149 |         [C(DTLB)][C(OP_READ)][C(RESULT_MISS)]   = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:121:65: warning: initialized field overwritten [-Woverride-init]
     121 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR                  0x4D
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:150:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR'
     150 |         [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)]  = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:121:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][1][1]')
     121 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR                  0x4D
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:150:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR'
     150 |         [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)]  = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:137:65: warning: initialized field overwritten [-Woverride-init]
     137 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD                      0x60
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:152:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD'
     152 |         [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:137:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[6][0][0]')
     137 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD                      0x60
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:152:51: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD'
     152 |         [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:138:65: warning: initialized field overwritten [-Woverride-init]
     138 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR                      0x61
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:153:52: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR'
     153 |         [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
         |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/arm64/include/asm/perf_event.h:138:65: note: (near initialization for 'armv8_vulcan_perf_cache_map[6][1][0]')
     138 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR                      0x61
         |                                                                 ^~~~
   arch/arm64/kernel/perf_event.c:153:52: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR'
     153 |         [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
         |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> arch/arm64/kernel/perf_event.c:1191:5: warning: no previous prototype for 'armv8pmu_proc_user_access_handler' [-Wmissing-prototypes]
    1191 | int armv8pmu_proc_user_access_handler(struct ctl_table *table, int write,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


cppcheck possible warnings: (new ones prefixed by >>, may not real problems)

>> arch/arm64/kernel/perf_event.c:299:2: warning: Non-boolean value returned from function returning bool [returnNonBoolInBooleanFunction]
    return event->attr.config1 & 0x2;
    ^

vim +/armv8pmu_proc_user_access_handler +1191 arch/arm64/kernel/perf_event.c

  1190	
> 1191	int armv8pmu_proc_user_access_handler(struct ctl_table *table, int write,
  1192	                void *buffer, size_t *lenp, loff_t *ppos)
  1193	{
  1194		int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
  1195		if (ret || !write || sysctl_perf_user_access)
  1196			return ret;
  1197	
  1198		on_each_cpu(armv8pmu_disable_user_access_ipi, NULL, 1);
  1199		return 0;
  1200	}
  1201	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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