linux-kernel - Re: [PATCH v4 00/16] Basic StarFive JH7100 RISC-V SoC support

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Date:   Tue, 16 Nov 2021 17:07:54 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     Emil Renner Berthing <kernel@...il.dk>
Cc:     linux-riscv <linux-riscv@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Jiri Slaby <jirislaby@...nel.org>,
        Maximilian Luz <luzmaximilian@...il.com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        Drew Fustini <drew@...gleboard.org>,
        Geert Uytterhoeven <geert@...ux-m68k.org>,
        Michael Zhu <michael.zhu@...rfivetech.com>,
        Fu Wei <tekkamanninja@...il.com>,
        Anup Patel <anup.patel@....com>,
        Atish Patra <atish.patra@....com>,
        Matteo Croce <mcroce@...rosoft.com>,
        Arnd Bergmann <arnd@...db.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 00/16] Basic StarFive JH7100 RISC-V SoC support

On Tue, Nov 16, 2021 at 4:01 PM Emil Renner Berthing <kernel@...il.dk> wrote:
>
> This series adds support for the StarFive JH7100 RISC-V SoC. The SoC has
> many devices that need non-coherent dma operations to work which isn't
> upstream yet[1], so this just adds basic support to boot up, get a
> serial console, blink an LED and reboot itself. Unlike the Allwinner D1
> this chip doesn't use any extra pagetable bits, but instead the DDR RAM
> appears twice in the memory map, with and without the cache.
>
> The JH7100 is a test chip for the upcoming JH7110 and about 300 BeagleV
> Starlight Beta boards were sent out with them as part of a now cancelled
> BeagleBoard.org project. However StarFive has produced more of the
> JH7100s and more boards will be available[2] to buy. I've seen pictures
> of the new boards now, so hopefully before the end of the year.
>
> This series is also available at
> https://github.com/esmil/linux/commits/starlight-minimal
> ..but a more complete kernel including drivers for non-coherent
> peripherals based on this series can be found at
> https://github.com/starfive-tech/linux/tree/visionfive
>
> [1]: https://lore.kernel.org/linux-riscv/20210723214031.3251801-2-atish.patra@wdc.com/
> [2]: https://www.linkedin.com/pulse/starfive-release-open-source-single-board-platform-q3-2021-starfive/

Thanks for adding me to Cc, I've had a look at the series and didn't
see anything
wrong with it, and I'm happy to merge it through the SoC tree for the
initial support
in 5.17, provided you get an Ack from the arch/riscv maintainers for it.

One general (minor) comment about the patches: please put your own
'Signed-off-by'
into the last line of the patch description, below all the lines you
took from other people, so
instead of:

| Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
| Reviewed-by: Geert Uytterhoeven <geert@...ux-m68k.org>
| Acked-by: Rob Herring <robh@...nel.org>

do this:

| Reviewed-by: Geert Uytterhoeven <geert@...ux-m68k.org>
| Acked-by: Rob Herring <robh@...nel.org>
| Signed-off-by: Emil Renner Berthing <kernel@...il.dk>

Regarding the coherency issue, it's a bit sad to see yet another hacky
workaround
in the hardware, but as you say this is unrelated to the driver
series. I'd actually
argue that this one isn't that different from the other hack you
describe, except
this steals the pagetable bits from the address instead of the reserved flags...

          Arnd