linux-kernel - Re: [PATCH v4 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver

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Date:   Tue, 16 Nov 2021 18:21:09 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Emil Renner Berthing <kernel@...il.dk>
Cc:     linux-riscv <linux-riscv@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Jiri Slaby <jirislaby@...nel.org>,
        Maximilian Luz <luzmaximilian@...il.com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        Drew Fustini <drew@...gleboard.org>,
        Geert Uytterhoeven <geert@...ux-m68k.org>,
        Michael Zhu <michael.zhu@...rfivetech.com>,
        Fu Wei <tekkamanninja@...il.com>,
        Anup Patel <anup.patel@....com>,
        Atish Patra <atish.patra@....com>,
        Matteo Croce <mcroce@...rosoft.com>,
        Arnd Bergmann <arnd@...db.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 09/16] reset: starfive-jh7100: Add StarFive JH7100
 reset driver

On Tue, Nov 16, 2021 at 6:06 PM Emil Renner Berthing <kernel@...il.dk> wrote:
> On Tue, 16 Nov 2021 at 17:01, Andy Shevchenko <andy.shevchenko@...il.com> wrote:
> > On Tue, Nov 16, 2021 at 5:06 PM Emil Renner Berthing <kernel@...il.dk> wrote:

...

> > > +#if BITS_PER_LONG == 64
> > > +#define jh7100_reset_read      readq
> > > +#define jh7100_reset_write     writeq
> > > +#else
> > > +#define jh7100_reset_read      readl
> > > +#define jh7100_reset_write     writel
> > > +#endif
> >
> > No need, just use always readq() / writeq() and include io-64-nonatomic-lo-hi
>
> Hmm.. how would that work on a 32bit architecture where sizeof(long)
> == 4? The whole point of this is to read chunks in sizes matching the
> words in the bitmap later on.

Why not? You just put some amendments, see below an example.

...

> > > +       void __iomem *reg_assert = data->base + JH7100_RESET_ASSERT0 + offset * sizeof(long);
> > > +       void __iomem *reg_status = data->base + JH7100_RESET_STATUS0 + offset * sizeof(long);
> > > +       unsigned long value;

      void __iomem *reg_assert = data->base + JH7100_RESET_ASSERT0 + off64;
      void __iomem *reg_status = data->base + JH7100_RESET_STATUS0 + off64;
      u64 value;

> > > +       value = jh7100_reset_read(reg_assert);
> > > +       if (assert)
> > > +               value |= mask;
> > > +       else
> > > +               value &= ~mask;
> > > +       jh7100_reset_write(value, reg_assert);

value = readq(...);
...update...
writeq(value, ...);

> > > +       /* if the associated clock is gated, deasserting might otherwise hang forever */
> > > +       ret = readx_poll_timeout_atomic(jh7100_reset_read, reg_status, value,
> > > +                                       (value & mask) == done, 0, 1000);

readq_poll_timeout_atomic()

Maybe at the end of the day simple use of u64 will be better than bitmap.
Up to you, you have got the idea. Either way you may put my tag.

-- 
With Best Regards,
Andy Shevchenko