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Date: Wed, 17 Nov 2021 18:09:39 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Fabien Parent <fparent@...libre.com>,
Rob Herring <robh+dt@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/4] arm64: dts: mediatek: mt8192: fix i2c node names
On 10/11/2021 20:49, Fabien Parent wrote:
> Fix the i2c node names to be compliant to the YAML schema. The
> I2C node name should match the following pattern: "^i2c@[0-9a-f]+$".
>
> Signed-off-by: Fabien Parent <fparent@...libre.com>
Applied to v5.16-next/dts64
Thanks
> ---
>
> v3: rebased
> v2: new patch
>
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index c7c7d4e017ae..53d790c335f9 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -479,7 +479,7 @@ audsys: clock-controller@...10000 {
> #clock-cells = <1>;
> };
>
> - i2c3: i2c3@...b0000 {
> + i2c3: i2c@...b0000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11cb0000 0 0x1000>,
> <0 0x10217300 0 0x80>;
> @@ -498,7 +498,7 @@ imp_iic_wrap_e: clock-controller@...b1000 {
> #clock-cells = <1>;
> };
>
> - i2c7: i2c7@...00000 {
> + i2c7: i2c@...00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d00000 0 0x1000>,
> <0 0x10217600 0 0x180>;
> @@ -511,7 +511,7 @@ i2c7: i2c7@...00000 {
> status = "disabled";
> };
>
> - i2c8: i2c8@...01000 {
> + i2c8: i2c@...01000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d01000 0 0x1000>,
> <0 0x10217780 0 0x180>;
> @@ -524,7 +524,7 @@ i2c8: i2c8@...01000 {
> status = "disabled";
> };
>
> - i2c9: i2c9@...02000 {
> + i2c9: i2c@...02000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d02000 0 0x1000>,
> <0 0x10217900 0 0x180>;
> @@ -543,7 +543,7 @@ imp_iic_wrap_s: clock-controller@...03000 {
> #clock-cells = <1>;
> };
>
> - i2c1: i2c1@...20000 {
> + i2c1: i2c@...20000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d20000 0 0x1000>,
> <0 0x10217100 0 0x80>;
> @@ -556,7 +556,7 @@ i2c1: i2c1@...20000 {
> status = "disabled";
> };
>
> - i2c2: i2c2@...21000 {
> + i2c2: i2c@...21000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d21000 0 0x1000>,
> <0 0x10217180 0 0x180>;
> @@ -569,7 +569,7 @@ i2c2: i2c2@...21000 {
> status = "disabled";
> };
>
> - i2c4: i2c4@...22000 {
> + i2c4: i2c@...22000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11d22000 0 0x1000>,
> <0 0x10217380 0 0x180>;
> @@ -588,7 +588,7 @@ imp_iic_wrap_ws: clock-controller@...23000 {
> #clock-cells = <1>;
> };
>
> - i2c5: i2c5@...00000 {
> + i2c5: i2c@...00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11e00000 0 0x1000>,
> <0 0x10217500 0 0x80>;
> @@ -607,7 +607,7 @@ imp_iic_wrap_w: clock-controller@...01000 {
> #clock-cells = <1>;
> };
>
> - i2c0: i2c0@...00000 {
> + i2c0: i2c@...00000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11f00000 0 0x1000>,
> <0 0x10217080 0 0x80>;
> @@ -620,7 +620,7 @@ i2c0: i2c0@...00000 {
> status = "disabled";
> };
>
> - i2c6: i2c6@...01000 {
> + i2c6: i2c@...01000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11f01000 0 0x1000>,
> <0 0x10217580 0 0x80>;
>
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