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Message-ID: <68544192-0c4f-ed64-27a2-0bfe2d7805b5@kernel.org>
Date:   Mon, 22 Nov 2021 17:25:27 +0200
From:   Georgi Djakov <djakov@...nel.org>
To:     bjorn.andersson@...aro.org,
        Odelu Kukatla <okukatla@...eaurora.org>,
        georgi.djakov@...aro.org, evgreen@...gle.com,
        Andy Gross <agross@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     sboyd@...nel.org, mdtipton@...eaurora.org, sibis@...eaurora.org,
        saravanak@...gle.com, seansw@....qualcomm.com, elder@...aro.org,
        linux-pm@...r.kernel.org, linux-arm-msm-owner@...r.kernel.org
Subject: Re: [v8 3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect
 provider

On 21.10.21 13:40, Odelu Kukatla wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider node on SC7280
> SoCs.
> 
> Signed-off-by: Odelu Kukatla <okukatla@...eaurora.org>

Acked-by: Georgi Djakov <djakov@...nel.org>

> ---
>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index d74a4c8..0b55742 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -3687,6 +3687,14 @@
>   			};
>   		};
>   
> +		epss_l3: interconnect@...90000 {
> +			compatible = "qcom,sc7280-epss-l3";
> +			reg = <0 0x18590000 0 0x1000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
> +			clock-names = "xo", "alternate";
> +			#interconnect-cells = <1>;
> +		};
> +
>   		cpufreq_hw: cpufreq@...91000 {
>   			compatible = "qcom,cpufreq-epss";
>   			reg = <0 0x18591000 0 0x1000>,
> 

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