[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6e22cf38-39b6-6cd4-1435-c9a9f2e50230@amd.com>
Date: Tue, 23 Nov 2021 15:52:06 -0600
From: "Moger, Babu" <bmoger@....com>
To: Guenter Roeck <linux@...ck-us.net>,
Babu Moger <babu.moger@....com>, clemens@...isch.de,
jdelvare@...e.com
Cc: linux-hwmon@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] hwmon: (k10temp) Move the CCD limit info inside
k10temp_data structure
On 11/23/2021 3:40 PM, Guenter Roeck wrote:
> On 11/23/21 1:16 PM, Babu Moger wrote:
>> It seems appropriate to move the CCD specific information inside the
>> k10temp_data structure.
>>
>
> Why ? I don't see it used outside k10temp_get_ccd_support().
Thought it will be cleaner to have it all together at one structure. If
you feel otherwise I can remove it.
Thanks
Babu
>
> Guenter
>
>> Signed-off-by: Babu Moger <babu.moger@....com>
>> ---
>> Note: Generated the patch on top of hwmon-next.
>>
>> drivers/hwmon/k10temp.c | 17 +++++++++++------
>> 1 file changed, 11 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
>> index 880990fa4795..bd436b380a02 100644
>> --- a/drivers/hwmon/k10temp.c
>> +++ b/drivers/hwmon/k10temp.c
>> @@ -85,6 +85,7 @@ struct k10temp_data {
>> u32 show_temp;
>> bool is_zen;
>> u32 ccd_offset;
>> + u32 ccd_limit;
>> };
>> #define TCTL_BIT 0
>> @@ -357,12 +358,12 @@ static const struct hwmon_chip_info
>> k10temp_chip_info = {
>> };
>> static void k10temp_get_ccd_support(struct pci_dev *pdev,
>> - struct k10temp_data *data, int limit)
>> + struct k10temp_data *data)
>> {
>> u32 regval;
>> int i;
>> - for (i = 0; i < limit; i++) {
>> + for (i = 0; i < data->ccd_limit; i++) {
>> amd_smn_read(amd_pci_dev_to_node_id(pdev),
>> ZEN_CCD_TEMP(data->ccd_offset, i), ®val);
>> if (regval & ZEN_CCD_TEMP_VALID)
>> @@ -411,14 +412,16 @@ static int k10temp_probe(struct pci_dev *pdev,
>> const struct pci_device_id *id)
>> case 0x11: /* Zen APU */
>> case 0x18: /* Zen+ APU */
>> data->ccd_offset = 0x154;
>> - k10temp_get_ccd_support(pdev, data, 4);
>> + data->ccd_limit = 4;
>> + k10temp_get_ccd_support(pdev, data);
>> break;
>> case 0x31: /* Zen2 Threadripper */
>> case 0x60: /* Renoir */
>> case 0x68: /* Lucienne */
>> case 0x71: /* Zen2 */
>> data->ccd_offset = 0x154;
>> - k10temp_get_ccd_support(pdev, data, 8);
>> + data->ccd_limit = 8;
>> + k10temp_get_ccd_support(pdev, data);
>> break;
>> }
>> } else if (boot_cpu_data.x86 == 0x19) {
>> @@ -431,13 +434,15 @@ static int k10temp_probe(struct pci_dev *pdev,
>> const struct pci_device_id *id)
>> case 0x21: /* Zen3 Ryzen Desktop */
>> case 0x50 ... 0x5f: /* Green Sardine */
>> data->ccd_offset = 0x154;
>> - k10temp_get_ccd_support(pdev, data, 8);
>> + data->ccd_limit = 8;
>> + k10temp_get_ccd_support(pdev, data);
>> break;
>> case 0x10 ... 0x1f:
>> case 0x40 ... 0x4f: /* Yellow Carp */
>> case 0xa0 ... 0xaf:
>> data->ccd_offset = 0x300;
>> - k10temp_get_ccd_support(pdev, data, 8);
>> + data->ccd_limit = 8;
>> + k10temp_get_ccd_support(pdev, data);
>> break;
>> }
>> } else {
>>
>>
>
Powered by blists - more mailing lists