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Message-Id: <20211130212137.25303-3-martin.botka@somainline.org>
Date: Tue, 30 Nov 2021 22:21:34 +0100
From: Martin Botka <martin.botka@...ainline.org>
To: martin.botka1@...il.com
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
konrad.dybcio@...ainline.org,
angelogioacchino.delregno@...ainline.org,
marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
paul.bouchara@...ainline.org,
Martin Botka <martin.botka@...ainline.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/3] arm64: dt: qcom: sm6125.dtsi: Add dispcc
Add the dispcc node from the newly added DISPCC
driver for Qualcomm Technology Inc's SM6125 SoC.
Signed-off-by: Martin Botka <martin.botka@...ainline.org>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 51286ddbdb10..78f4705e4117 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -3,6 +3,7 @@
* Copyright (c) 2021, Martin Botka <martin.botka@...ainline.org>
*/
+#include <dt-bindings/clock/qcom,dispcc-sm6125.h>
#include <dt-bindings/clock/qcom,gcc-sm6125.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/gpio/gpio.h>
@@ -317,6 +318,17 @@ soc {
ranges = <0x00 0x00 0x00 0xffffffff>;
compatible = "simple-bus";
+ dispcc: clock-controller@...0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,dispcc-sm6125";
+ reg = <0x5f00000 0x20000>;
+ clocks = <&gcc GCC_DISP_AHB_CLK>;
+ clock-names = "cfg_ahb_clk";
+ #clock-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
tcsr_mutex: hwlock@...000 {
compatible = "qcom,tcsr-mutex";
reg = <0x00340000 0x20000>;
--
2.34.0
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