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Message-ID: <ef6e0041-0e99-d169-d9af-9fa4d4ad5960@linaro.org>
Date: Wed, 1 Dec 2021 15:09:46 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Vinod Koul <vkoul@...nel.org>, Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Vamsi Krishna Lanka <quic_vamslank@...cinc.com>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] clk: qcom: rpmh: add support for SM8450 rpmh clocks
On 01/12/2021 10:23, Vinod Koul wrote:
> This adds the RPMH clocks present in SM8450 SoC
>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/clk/qcom/clk-rpmh.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> index 441d7a20e6f3..0403cff6c230 100644
> --- a/drivers/clk/qcom/clk-rpmh.c
> +++ b/drivers/clk/qcom/clk-rpmh.c
> @@ -515,6 +515,32 @@ static const struct clk_rpmh_desc clk_rpmh_sm8350 = {
> /* Resource name must match resource id present in cmd-db */
> DEFINE_CLK_RPMH_ARC(sc7280, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 4);
>
> +DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4);
> +DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 4);
> +
> +static struct clk_hw *sm8450_rpmh_clocks[] = {
> + [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw,
> + [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw,
> + [RPMH_LN_BB_CLK1] = &sm8450_ln_bb_clk1.hw,
> + [RPMH_LN_BB_CLK1_A] = &sm8450_ln_bb_clk1_ao.hw,
> + [RPMH_LN_BB_CLK2] = &sm8450_ln_bb_clk2.hw,
> + [RPMH_LN_BB_CLK2_A] = &sm8450_ln_bb_clk2_ao.hw,
> + [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw,
> + [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw,
> + [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw,
> + [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw,
> + [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw,
> + [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw,
> + [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw,
> + [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw,
> + [RPMH_IPA_CLK] = &sdm845_ipa.hw,
> +};
> +
> +static const struct clk_rpmh_desc clk_rpmh_sm8450 = {
> + .clks = sm8450_rpmh_clocks,
> + .num_clks = ARRAY_SIZE(sm8450_rpmh_clocks),
> +};
> +
> static struct clk_hw *sc7280_rpmh_clocks[] = {
> [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw,
> [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw,
> @@ -647,6 +673,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
> { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
> { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
> { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
> + { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
> { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
> { }
> };
>
--
With best wishes
Dmitry
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