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Message-ID: <3fe36e35-8c4b-f772-be43-8e8c49e97f63@somainline.org>
Date: Wed, 1 Dec 2021 16:03:47 +0100
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Vinod Koul <vkoul@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 01/15] arm64: dts: qcom: Add base SM8450 DTSI
On 01.12.2021 08:29, Vinod Koul wrote:
> This add based DTSI for SM8450 SoC and includes base description of
> CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to
> shell with console on boards with this SoC
>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 476 +++++++++++++++++++++++++++
> 1 file changed, 476 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sm8450.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> new file mode 100644
> index 000000000000..d838283bde4b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -0,0 +1,476 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, Linaro Limited
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,gcc-sm8450.h>
> +#include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +
> +/ {
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + chosen { };
> +
> + clocks {
> + xo_board: xo-board {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <76800000>;
> + clock-output-names = "xo_board";
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <32000>;
> + #clock-cells = <0>;
> + };
No clock-output-names for this one?
Other than that:
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
Konrad
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