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Message-ID: <38601fab-816c-37aa-1839-96fa7c6a3959@canonical.com>
Date: Thu, 2 Dec 2021 09:28:18 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Sam Protsenko <semen.protsenko@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Cc: Jaewon Kim <jaewon02.kim@...sung.com>,
Chanho Park <chanho61.park@...sung.com>,
David Virag <virag.david003@...il.com>,
Youngmin Nam <youngmin.nam@...sung.com>,
Wolfram Sang <wsa@...nel.org>, Arnd Bergmann <arnd@...db.de>,
linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH 5/6] i2c: exynos5: Add bus clock support
On 01/12/2021 20:04, Sam Protsenko wrote:
> In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
> part of USIv2 block, there are two clocks provided to HSI2C controller:
> - PCLK: bus clock (APB), provides access to register interface
> - IPCLK: operating IP-core clock; SCL is derived from this one
>
> Both clocks have to be asserted for HSI2C to be functional in that case.
>
> Add code to obtain and enable/disable PCLK in addition to already
> handled operating clock. Make it optional though, as older Exynos SoC
> variants only have one HSI2C clock.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
> drivers/i2c/busses/i2c-exynos5.c | 46 ++++++++++++++++++++++++++------
> 1 file changed, 38 insertions(+), 8 deletions(-)
>
You could use clk_bulk API, but for two clocks, where one is optional,
it won't reduce much of code, so I am fine here:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Best regards,
Krzysztof
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