lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 6 Dec 2021 08:29:04 +0100
From:   Andrej Picej <andrej.picej@...ik.com>
To:     Christoph Niedermaier <cniedermaier@...electronics.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Cc:     Support Opensource <support.opensource@...semi.com>,
        Adam Thomson <Adam.Thomson.Opensource@...semi.com>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        "linux-watchdog@...r.kernel.org" <linux-watchdog@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Guenter Roeck <linux@...ck-us.net>
Subject: Re: [RFC PATCH] watchdog: da9062: Correct the timeout values



On 3. 12. 21 18:31, Christoph Niedermaier wrote:
> From: Guenter Roeck
> Sent: Friday, December 3, 2021 5:52 PM
>> On 12/3/21 8:35 AM, Christoph Niedermaier wrote:
>>> I measured the timeout values of my DA9061 chip. According to the
>>> information in the data sheet the formula should be:
>>>
>>> timeout = 2.048 * 2^(regval - 1)
>>>
>>> But my measured values differ from that.
>>> Accoring to my measured values the formula must be:
>>>
>>> timeout = 3.2 * 2^(regval - 1)
>>>
>>> Is there something wrong with my chip, or has anyone else noticed this as well?
>>
>> The driver assumes a static and well defined clock rate. Maybe that rate
>> is different in your system (if that is possible) ?
>>
>> Guenter
> 
> @Andrej
> Do the values in the driver match what your chip does?
> 

Just did a quick test. The values in the driver match what the chip 
does. I checked multiple timeouts 16, 32, 65 and 131 seconds. The 
timeout triggers quite accurately.

> I have not changed anything. After power on, the chip behaves like this.
> So I guess it either come from an OTP value or the wiring outside the chip.
> Does anyone know what needs to be checked?

Can't help you here, sorry.

Best regards,
Andrej

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ