| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20211208003727.3596577-2-f.fainelli@gmail.com>
Date: Tue, 7 Dec 2021 16:37:12 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: devicetree@...r.kernel.org
Cc: Florian Fainelli <f.fainelli@...il.com>,
Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
bcm-kernel-feedback-list@...adcom.com (maintainer:BROADCOM BCM7XXX ARM
ARCHITECTURE), Gregory Fong <gregory.0xf0@...il.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, Lee Jones <lee.jones@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Herbert Xu <herbert@...dor.apana.org.au>,
Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Amit Kucheria <amitk@...nel.org>,
Zhang Rui <rui.zhang@...el.com>,
Markus Mayer <mmayer@...adcom.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Al Cooper <alcooperx@...il.com>,
Doug Berger <opendmb@...il.com>,
linux-ide@...r.kernel.org (open list:LIBATA SUBSYSTEM (Serial and
Parallel ATA drivers)), linux-kernel@...r.kernel.org (open list),
linux-gpio@...r.kernel.org (open list:GPIO SUBSYSTEM),
linux-arm-kernel@...ts.infradead.org (moderated list:BROADCOM BCM7XXX
ARM ARCHITECTURE),
linux-mmc@...r.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE
DIGITAL (SD) AND...),
linux-pwm@...r.kernel.org (open list:PWM SUBSYSTEM),
linux-crypto@...r.kernel.org (open list:HARDWARE RANDOM NUMBER
GENERATOR CORE),
linux-rtc@...r.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM),
linux-pm@...r.kernel.org (open list:THERMAL),
linux-usb@...r.kernel.org (open list:USB SUBSYSTEM)
Subject: [PATCH v3 01/15] dt-bindings: mmc: Convert Broadcom STB SDHCI binding to YAML
Convert the Broadcom STB SDHCI controller Device Tree binding to YAML.
Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
.../bindings/mmc/brcm,sdhci-brcmstb.txt | 53 ----------
.../bindings/mmc/brcm,sdhci-brcmstb.yaml | 100 ++++++++++++++++++
2 files changed, 100 insertions(+), 53 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.txt
create mode 100644 Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.txt b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.txt
deleted file mode 100644
index ae2074184528..000000000000
--- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-* BROADCOM BRCMSTB/BMIPS SDHCI Controller
-
-This file documents differences between the core properties in mmc.txt
-and the properties used by the sdhci-brcmstb driver.
-
-NOTE: The driver disables all UHS speed modes by default and depends
-on Device Tree properties to enable them for SoC/Board combinations
-that support them.
-
-Required properties:
-- compatible: should be one of the following
- - "brcm,bcm7425-sdhci"
- - "brcm,bcm7445-sdhci"
- - "brcm,bcm7216-sdhci"
-
-Refer to clocks/clock-bindings.txt for generic clock consumer properties.
-
-Example:
-
- sdhci@...0000 {
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- sd-uhs-sdr104;
- sdhci,auto-cmd12;
- compatible = "brcm,bcm7216-sdhci",
- "brcm,bcm7445-sdhci",
- "brcm,sdhci-brcmstb";
- reg = <0x84b0000 0x260 0x84b0300 0x200>;
- reg-names = "host", "cfg";
- interrupts = <0x0 0x26 0x4>;
- interrupt-names = "sdio0_0";
- clocks = <&scmi_clk 245>;
- clock-names = "sw_sdio";
- };
-
- sdhci@...1000 {
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- supports-cqe;
- non-removable;
- bus-width = <0x8>;
- compatible = "brcm,bcm7216-sdhci",
- "brcm,bcm7445-sdhci",
- "brcm,sdhci-brcmstb";
- reg = <0x84b1000 0x260 0x84b1300 0x200>;
- reg-names = "host", "cfg";
- interrupts = <0x0 0x27 0x4>;
- interrupt-names = "sdio1_0";
- clocks = <&scmi_clk 245>;
- clock-names = "sw_sdio";
- };
diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
new file mode 100644
index 000000000000..dccd5ad96981
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BRCMSTB/BMIPS SDHCI Controller binding
+
+maintainers:
+ - Al Cooper <alcooperx@...il.com>
+ - Florian Fainelli <f.fainelli@...il.com>
+
+allOf:
+ - $ref: mmc-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - brcm,bcm7216-sdhci
+ - const: brcm,bcm7445-sdhci
+ - const: brcm,sdhci-brcmstb
+ - items:
+ - enum:
+ - brcm,bcm7445-sdhci
+ - const: brcm,sdhci-brcmstb
+ - items:
+ - enum:
+ - brcm,bcm7425-sdhci
+ - const: brcm,sdhci-brcmstb
+
+ reg:
+ minItems: 2
+
+ reg-names:
+ items:
+ - const: host
+ - const: cfg
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+ description:
+ handle to core clock for the sdhci controller.
+
+ clock-names:
+ items:
+ - const: sw_sdio
+
+ sdhci,auto-cmd12:
+ type: boolean
+ description: Specifies that controller should use auto CMD12
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ mmc@...0000 {
+ sd-uhs-sdr50;
+ sd-uhs-ddr50;
+ sd-uhs-sdr104;
+ sdhci,auto-cmd12;
+ compatible = "brcm,bcm7216-sdhci",
+ "brcm,bcm7445-sdhci",
+ "brcm,sdhci-brcmstb";
+ reg = <0x84b0000 0x260>, <0x84b0300 0x200>;
+ reg-names = "host", "cfg";
+ interrupts = <0x0 0x26 0x4>;
+ interrupt-names = "sdio0_0";
+ clocks = <&scmi_clk 245>;
+ clock-names = "sw_sdio";
+ };
+
+ mmc@...1000 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ supports-cqe;
+ non-removable;
+ bus-width = <0x8>;
+ compatible = "brcm,bcm7216-sdhci",
+ "brcm,bcm7445-sdhci",
+ "brcm,sdhci-brcmstb";
+ reg = <0x84b1000 0x260>, <0x84b1300 0x200>;
+ reg-names = "host", "cfg";
+ interrupts = <0x0 0x27 0x4>;
+ interrupt-names = "sdio1_0";
+ clocks = <&scmi_clk 245>;
+ clock-names = "sw_sdio";
+ };
--
2.25.1
Powered by blists - more mailing lists